diff options
| author | Xiongfeng Wang <wangxiongfeng2@huawei.com> | 2021-07-14 09:32:55 +0800 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2021-07-21 17:29:40 +0200 |
| commit | e022eac85ecd2140a0829970d923d984356185eb (patch) | |
| tree | 47c10c6ac6aff84a2fbaa08e0b14d33ba90c7ecc /drivers/base/cacheinfo.c | |
| parent | f04948dea236b000da09c466a7ec931ecd8d7867 (diff) | |
cacheinfo: clear cache_leaves(cpu) in free_cache_attributes()
On ARM64, when PPTT(Processor Properties Topology Table) is not
implemented in ACPI boot, we will goto 'free_ci' with the following
print:
Unable to detect cache hierarchy for CPU 0
But some other codes may still use 'num_leaves' to iterate through the
'info_list', such as get_cpu_cacheinfo_id(). If 'info_list' is NULL , it
would crash. So clear 'num_leaves' in free_cache_attributes().
Reviewed-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Xiongfeng Wang <wangxiongfeng2@huawei.com>
Link: https://lore.kernel.org/r/1626226375-58730-1-git-send-email-wangxiongfeng2@huawei.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/base/cacheinfo.c')
| -rw-r--r-- | drivers/base/cacheinfo.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/base/cacheinfo.c b/drivers/base/cacheinfo.c index bfc095956dd1..dad296229161 100644 --- a/drivers/base/cacheinfo.c +++ b/drivers/base/cacheinfo.c @@ -297,6 +297,7 @@ static void free_cache_attributes(unsigned int cpu) kfree(per_cpu_cacheinfo(cpu)); per_cpu_cacheinfo(cpu) = NULL; + cache_leaves(cpu) = 0; } int __weak init_cache_level(unsigned int cpu) |