bus: fsl-mc: add IOMMU mappings for MC firmware and DCFG

The MC firmware (which runs the networking subsystem) is loaded into
RAM by U-Boot, and this region is omitted from the memory passed to
the kernel via DT. Prior to booting the kernel, the MC processing is
halted to allow IOMMU setup.

When booting the kernel with IOMMU support enabled and without using
both bypass and passthrough mode, the MC firmware crashes as soon as
it is released, as the MC is unable to access the RAM that has been
assigned to it for both the firmware image and other purposes, and
also the DCFG to retrieve the SoC version.

In order to avoid this, we need to setup identity mappings in the MC
domain. For the MC RAM region, we read the firmware base address
registers which tell us where the firmware is located. According to
the MC design document, the firmware is loaded within the upper 512M
of the MC RAM region, aligned to 512M, and the RAM region is also
aligned to 512M. The lower 8 bits of the firmware base address low
register tells us how large the RAM region is. Use this to calculate
its size and location in order to create an indentity mapping.

We also search DT for the DCFG node to retrieve its address, and create
a read-only identity mapping to allow the MC firmware to read the SoC
version. If we are unable to find the DCFG node, we use a default
address for this. [XXX This needs to be improved XXX]

This allows "arm-smmu.disable_bypass=1" to be dropped from the kernel
command line for LX2160A platforms.

Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>

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