diff options
| author | Tony Lindgren <tony@atomide.com> | 2020-10-26 10:08:47 +0200 |
|---|---|---|
| committer | Tony Lindgren <tony@atomide.com> | 2020-10-26 10:08:53 +0200 |
| commit | e7ae08d398e094e1305dee823435b1f996d39106 (patch) | |
| tree | 4c4dbe1a92b11c5682e6dd96dc4fc3159a614485 /drivers/bus/ti-sysc.c | |
| parent | e275d2109cdaea8b4554b9eb8a828bdb8f8ba068 (diff) | |
bus: ti-sysc: Fix bogus resetdone warning on enable for cpsw
Bail out early from sysc_wait_softreset() just like we do in sysc_reset()
if there's no sysstatus srst_shift to fix a bogus resetdone warning on
enable as suggested by Grygorii Strashko <grygorii.strashko@ti.com>.
We do not currently handle resets for modules that need writing to the
sysstatus register. If we at some point add that, we also need to add
SYSS_QUIRK_RESETDONE_INVERTED flag for cpsw as the sysstatus bit is low
when reset is done as described in the am335x TRM "Table 14-202
SOFT_RESET Register Field Descriptions"
Fixes: d46f9fbec719 ("bus: ti-sysc: Use optional clocks on for enable and wait for softreset bit")
Suggested-by: Grygorii Strashko <grygorii.strashko@ti.com>
Acked-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'drivers/bus/ti-sysc.c')
| -rw-r--r-- | drivers/bus/ti-sysc.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/bus/ti-sysc.c b/drivers/bus/ti-sysc.c index 88a751c11677..16132e6e91f8 100644 --- a/drivers/bus/ti-sysc.c +++ b/drivers/bus/ti-sysc.c @@ -227,6 +227,9 @@ static int sysc_wait_softreset(struct sysc *ddata) u32 sysc_mask, syss_done, rstval; int syss_offset, error = 0; + if (ddata->cap->regbits->srst_shift < 0) + return 0; + syss_offset = ddata->offsets[SYSC_SYSSTATUS]; sysc_mask = BIT(ddata->cap->regbits->srst_shift); |