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authorChris Wilson <chris@chris-wilson.co.uk>2016-08-18 17:16:41 +0100
committerChris Wilson <chris@chris-wilson.co.uk>2016-08-18 22:36:23 +0100
commit3497971a71d8b15a41b7bf2bf66ebf5909b2bd3f (patch)
treedc76c33e66248e3ad1ad990e75396a61cfcc6e89 /drivers/char/agp
parent600f436801deae65e48404847b61c89b4944e355 (diff)
agp/intel: Flush chipset writes after updating a single PTE
After we update one PTE for a page, the caller expects to be able to immediately use that through a GGTT read/write. To comply with the callers expectations we therefore need to flush the chipset buffers before returning. Reported-by: Matti Hämäläinen <ccr@tnsp.org> Fixes: d6473f566417 ("drm/i915: Add support for mapping an object page...") Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Ankitprasad Sharma <ankitprasad.r.sharma@intel.com> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Tested-by: Matti Hämäläinen <ccr@tnsp.org> Cc: drm-intel-fixes@lists.freedesktop.org Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/20160818161718.27187-2-chris@chris-wilson.co.uk
Diffstat (limited to 'drivers/char/agp')
-rw-r--r--drivers/char/agp/intel-gtt.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/char/agp/intel-gtt.c b/drivers/char/agp/intel-gtt.c
index 44311296ec02..0f7d28a98b9a 100644
--- a/drivers/char/agp/intel-gtt.c
+++ b/drivers/char/agp/intel-gtt.c
@@ -845,6 +845,8 @@ void intel_gtt_insert_page(dma_addr_t addr,
unsigned int flags)
{
intel_private.driver->write_entry(addr, pg, flags);
+ if (intel_private.driver->chipset_flush)
+ intel_private.driver->chipset_flush();
}
EXPORT_SYMBOL(intel_gtt_insert_page);