diff options
| author | Martin Blumenstingl <martin.blumenstingl@googlemail.com> | 2021-07-03 00:51:43 +0200 |
|---|---|---|
| committer | Stephen Boyd <sboyd@kernel.org> | 2021-08-05 17:36:10 -0700 |
| commit | d1e40bc9ff0527bfceed1caa6c1a7a1e2013d7e5 (patch) | |
| tree | 09fcfa6cfd4203bcac6cde1966c509bd325b278c /drivers/clk/clk-stm32f4.c | |
| parent | 699470f372bbd9d087fd30444b126729a38217ac (diff) | |
clk: stm32f4: Switch to clk_divider.determine_rate
.determine_rate is meant to replace .round_rate in CCF in the future.
Switch over to .determine_rate now that clk_divider_ops has gained
support for that.
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: Alexandre Torgue <alexandre.torgue@foss.st.com>
Cc: linux-stm32@st-md-mailman.stormreply.com
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Link: https://lore.kernel.org/r/20210702225145.2643303-5-martin.blumenstingl@googlemail.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'drivers/clk/clk-stm32f4.c')
| -rw-r--r-- | drivers/clk/clk-stm32f4.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/clk/clk-stm32f4.c b/drivers/clk/clk-stm32f4.c index 18117ce5ff85..22267fb3e92e 100644 --- a/drivers/clk/clk-stm32f4.c +++ b/drivers/clk/clk-stm32f4.c @@ -709,10 +709,10 @@ static unsigned long stm32f4_pll_div_recalc_rate(struct clk_hw *hw, return clk_divider_ops.recalc_rate(hw, parent_rate); } -static long stm32f4_pll_div_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *prate) +static int stm32f4_pll_div_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { - return clk_divider_ops.round_rate(hw, rate, prate); + return clk_divider_ops.determine_rate(hw, req); } static int stm32f4_pll_div_set_rate(struct clk_hw *hw, unsigned long rate, @@ -738,7 +738,7 @@ static int stm32f4_pll_div_set_rate(struct clk_hw *hw, unsigned long rate, static const struct clk_ops stm32f4_pll_div_ops = { .recalc_rate = stm32f4_pll_div_recalc_rate, - .round_rate = stm32f4_pll_div_round_rate, + .determine_rate = stm32f4_pll_div_determine_rate, .set_rate = stm32f4_pll_div_set_rate, }; |