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authorPatrice Chotard <patrice.chotard@st.com>2018-03-12 10:04:07 +0100
committerStephen Boyd <sboyd@kernel.org>2018-03-19 13:46:07 -0700
commitf9acf1057d5bfe56fcc0b8ee36787223ed3fc8be (patch)
treea1bc3001ede31eb89feea96f374f83765b549f48 /drivers/clk/clk-stm32f4.c
parent2f05b6b9208470fdd842a362135809df09834208 (diff)
clk: stm32: Add clk entry for SDMMC2 on stm32F769
STM32F769 has 2 SDMMC port, add clock entry for the second one. Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com> Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'drivers/clk/clk-stm32f4.c')
-rw-r--r--drivers/clk/clk-stm32f4.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/clk/clk-stm32f4.c b/drivers/clk/clk-stm32f4.c
index 3c287980ffb6..294850bdc195 100644
--- a/drivers/clk/clk-stm32f4.c
+++ b/drivers/clk/clk-stm32f4.c
@@ -282,6 +282,7 @@ static const struct stm32f4_gate_data stm32f746_gates[] __initconst = {
{ STM32F4_RCC_APB2ENR, 0, "tim1", "apb2_mul" },
{ STM32F4_RCC_APB2ENR, 1, "tim8", "apb2_mul" },
+ { STM32F4_RCC_APB2ENR, 7, "sdmmc2", "sdmux" },
{ STM32F4_RCC_APB2ENR, 8, "adc1", "apb2_div" },
{ STM32F4_RCC_APB2ENR, 9, "adc2", "apb2_div" },
{ STM32F4_RCC_APB2ENR, 10, "adc3", "apb2_div" },
@@ -315,7 +316,7 @@ static const u64 stm32f46xx_gate_map[MAX_GATE_MAP] = { 0x000000f17ef417ffull,
static const u64 stm32f746_gate_map[MAX_GATE_MAP] = { 0x000000f17ef417ffull,
0x0000000000000003ull,
- 0x04f77f033e01c9ffull };
+ 0x04f77f833e01c9ffull };
static const u64 *stm32f4_gate_map;