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authorGabriel Fernandez <gabriel.fernandez@st.com>2018-03-08 17:54:03 +0100
committerMichael Turquette <mturquette@baylibre.com>2018-03-11 15:40:33 -0700
commit2c87c9d33117446dab774a7e1b23806802f95c98 (patch)
tree847d00a9136acdfe8b46a0564f685982a2aab53f /drivers/clk/clk-stm32mp1.c
parent1f80590b6bdabffc90b9ed6a2d05dd9d24122879 (diff)
clk: stm32mp1: add RTC clock
This patch adds the RTC clock. Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com>
Diffstat (limited to 'drivers/clk/clk-stm32mp1.c')
-rw-r--r--drivers/clk/clk-stm32mp1.c15
1 files changed, 15 insertions, 0 deletions
diff --git a/drivers/clk/clk-stm32mp1.c b/drivers/clk/clk-stm32mp1.c
index b5379a224183..51e3e76b8fa5 100644
--- a/drivers/clk/clk-stm32mp1.c
+++ b/drivers/clk/clk-stm32mp1.c
@@ -248,6 +248,10 @@ static const char * const dsi_src[] = {
"ck_dsi_phy", "pll4_p"
};
+static const char * const rtc_src[] = {
+ "off", "ck_lse", "ck_lsi", "ck_hse_rtc"
+};
+
static const struct clk_div_table axi_div_table[] = {
{ 0, 1 }, { 1, 2 }, { 2, 3 }, { 3, 4 },
{ 4, 4 }, { 5, 4 }, { 6, 4 }, { 7, 4 },
@@ -1945,6 +1949,17 @@ static const struct clock_config stm32mp1_clock_cfg[] = {
_NO_GATE,
_MMUX(M_ETHCK),
_DIV(RCC_ETHCKSELR, 4, 4, CLK_DIVIDER_ALLOW_ZERO, NULL)),
+
+ /* RTC clock */
+ DIV(NO_ID, "ck_hse_rtc", "ck_hse", 0, RCC_RTCDIVR, 0, 7,
+ CLK_DIVIDER_ALLOW_ZERO),
+
+ COMPOSITE(RTC, "ck_rtc", rtc_src, CLK_OPS_PARENT_ENABLE |
+ CLK_SET_RATE_PARENT,
+ _GATE(RCC_BDCR, 20, 0),
+ _MUX(RCC_BDCR, 16, 2, 0),
+ _NO_DIV),
+
};
struct stm32_clock_match_data {