diff options
| author | Andrzej Hajda <a.hajda@samsung.com> | 2015-10-02 06:49:53 +0200 |
|---|---|---|
| committer | Stephen Boyd <sboyd@codeaurora.org> | 2016-01-29 16:43:58 -0800 |
| commit | 090341b0a95d1f6d762915a75c13b393366f4ab3 (patch) | |
| tree | 2acd04488b4cdc85a9b38cbdc55ea48426efaf42 /drivers/clk/clk-vt8500.c | |
| parent | 0b225e41e369a7e03411bb67988513302a10382f (diff) | |
clk: vt8500: fix sign of possible PLL values
With unsigned values underflow in loops can occur resulting in
theoretically infinite loops.
The problem has been detected using proposed semantic patch
scripts/coccinelle/tests/unsigned_lesser_than_zero.cocci [1].
[1]: http://permalink.gmane.org/gmane.linux.kernel/2038576
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Diffstat (limited to 'drivers/clk/clk-vt8500.c')
| -rw-r--r-- | drivers/clk/clk-vt8500.c | 9 |
1 files changed, 6 insertions, 3 deletions
diff --git a/drivers/clk/clk-vt8500.c b/drivers/clk/clk-vt8500.c index 37e928846ec5..98c4492d2c0d 100644 --- a/drivers/clk/clk-vt8500.c +++ b/drivers/clk/clk-vt8500.c @@ -384,7 +384,8 @@ static void vt8500_find_pll_bits(unsigned long rate, unsigned long parent_rate, static void wm8650_find_pll_bits(unsigned long rate, unsigned long parent_rate, u32 *multiplier, u32 *divisor1, u32 *divisor2) { - u32 mul, div1, div2; + u32 mul, div1; + int div2; u32 best_mul, best_div1, best_div2; unsigned long tclk, rate_err, best_err; @@ -452,7 +453,8 @@ static u32 wm8750_get_filter(u32 parent_rate, u32 divisor1) static void wm8750_find_pll_bits(unsigned long rate, unsigned long parent_rate, u32 *filter, u32 *multiplier, u32 *divisor1, u32 *divisor2) { - u32 mul, div1, div2; + u32 mul; + int div1, div2; u32 best_mul, best_div1, best_div2; unsigned long tclk, rate_err, best_err; @@ -496,7 +498,8 @@ static void wm8750_find_pll_bits(unsigned long rate, unsigned long parent_rate, static void wm8850_find_pll_bits(unsigned long rate, unsigned long parent_rate, u32 *multiplier, u32 *divisor1, u32 *divisor2) { - u32 mul, div1, div2; + u32 mul; + int div1, div2; u32 best_mul, best_div1, best_div2; unsigned long tclk, rate_err, best_err; |