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authorMartin Blumenstingl <martin.blumenstingl@googlemail.com>2018-11-15 23:40:44 +0100
committerNeil Armstrong <narmstrong@baylibre.com>2018-11-23 15:11:57 +0100
commita5ac1ead32c9aac285f6436e09b4f6111996e9b8 (patch)
tree9f3b64d743d0693c1fac5fd8df2ebffdf37348bf /drivers/clk/clk.c
parentd6e81845b7d900f1f6738bd972bf89dff4bd55a8 (diff)
clk: meson: meson8b: do not use cpu_div3 for cpu_scale_out_sel
The cpu_div3 clock (cpu_in divided by 3) generates a signal with a duty cycle of 33%. The CPU clock however requires a clock signal with a duty cycle of 50% to run stable. cpu_div3 was observed to be problematic when cycling through all available CPU frequencies (with additional patches on top of this one) while running "stress --cpu 4" in the background. This caused sporadic hangs where the whole system would fully lock up. Amlogic's 3.10 kernel code also does not use the cpu_div3 clock either when changing the CPU clock. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Reviewed-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Link: https://lkml.kernel.org/r/20181115224048.13511-3-martin.blumenstingl@googlemail.com
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