diff options
| author | Peng Fan <peng.fan@nxp.com> | 2023-04-03 17:52:56 +0800 |
|---|---|---|
| committer | Abel Vesa <abel.vesa@linaro.org> | 2023-04-09 16:48:54 +0300 |
| commit | 56b8d0bf3ea8b0db8543e04a6b97348a543405ab (patch) | |
| tree | 4f2d14f0206602d823192ed13fc107a02a4d9d1d /drivers/clk/imx/clk.h | |
| parent | 4435467b15b069e5a6f50ca9a9260e86b74dbc13 (diff) | |
clk: imx: fracn-gppll: support integer pll
The fracn gppll could be configured in FRAC or INTEGER mode during
hardware design. The current driver only support FRAC mode, while
this patch introduces INTEGER support. When the PLL is INTEGER pll,
there is no mfn, mfd, the calculation is as below:
Fvco_clk = (Fref / DIV[RDIV] ) * DIV[MFI]
Fclko_odiv = Fvco_clk / DIV[ODIV]
In this patch, we reuse the FRAC pll logic with some condition check to
simplify the driver
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Abel Vesa <abel.vesa@linaro.org>
Link: https://lore.kernel.org/r/20230403095300.3386988-4-peng.fan@oss.nxp.com
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Diffstat (limited to 'drivers/clk/imx/clk.h')
| -rw-r--r-- | drivers/clk/imx/clk.h | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/drivers/clk/imx/clk.h b/drivers/clk/imx/clk.h index ecce45b0dd70..c8db0c8d4c5d 100644 --- a/drivers/clk/imx/clk.h +++ b/drivers/clk/imx/clk.h @@ -73,6 +73,9 @@ extern struct imx_pll14xx_clk imx_1416x_pll; extern struct imx_pll14xx_clk imx_1443x_pll; extern struct imx_pll14xx_clk imx_1443x_dram_pll; +#define CLK_FRACN_GPPLL_INTEGER BIT(0) +#define CLK_FRACN_GPPLL_FRACN BIT(1) + /* NOTE: Rate table should be kept sorted in descending order. */ struct imx_fracn_gppll_rate_table { unsigned int rate; @@ -91,8 +94,12 @@ struct imx_fracn_gppll_clk { struct clk_hw *imx_clk_fracn_gppll(const char *name, const char *parent_name, void __iomem *base, const struct imx_fracn_gppll_clk *pll_clk); +struct clk_hw *imx_clk_fracn_gppll_integer(const char *name, const char *parent_name, + void __iomem *base, + const struct imx_fracn_gppll_clk *pll_clk); extern struct imx_fracn_gppll_clk imx_fracn_gppll; +extern struct imx_fracn_gppll_clk imx_fracn_gppll_integer; #define imx_clk_cpu(name, parent_name, div, mux, pll, step) \ to_clk(imx_clk_hw_cpu(name, parent_name, div, mux, pll, step)) |