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author | Yinbo Zhu <zhuyinbo@loongson.cn> | 2023-03-23 10:52:29 +0800 |
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committer | Stephen Boyd <sboyd@kernel.org> | 2023-03-27 12:15:26 -0700 |
commit | acc0ccffec502be0d64f477d4341957a897e4283 (patch) | |
tree | 8829b4a195d6a1bd441c1273d8ed332c5940fc3f /drivers/clk/mediatek/clk-mt7981-infracfg.c | |
parent | d8c0ee307a6086299157ce8eddec9aef478ef475 (diff) |
clk: clk-loongson2: add clock controller driver support
This driver provides support for clock controller on Loongson-2 SoC,
the Loongson-2 SoC uses a 100MHz clock as the PLL reference clock,
there are five independent PLLs inside, each of which PLL can
provide up to three sets of frequency dependent clock outputs.
Signed-off-by: Yinbo Zhu <zhuyinbo@loongson.cn>
Link: https://lore.kernel.org/r/20230323025229.2971-2-zhuyinbo@loongson.cn
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'drivers/clk/mediatek/clk-mt7981-infracfg.c')
0 files changed, 0 insertions, 0 deletions