diff options
| author | Jerome Brunet <jbrunet@baylibre.com> | 2019-05-13 14:31:14 +0200 |
|---|---|---|
| committer | Jerome Brunet <jbrunet@baylibre.com> | 2019-05-20 12:20:16 +0200 |
| commit | 19a18d42bf557b8420a55e0fce7be5aec9f8ef8c (patch) | |
| tree | 80d26dd0f83832759ff63cb19ca214a9eda7b7bb /drivers/clk/meson/meson-eeclk.c | |
| parent | 76d3fc38a06b4b2aa9a64a0e6a0bbe605d23991e (diff) | |
clk: meson: eeclk: add init regs
Like the PLL and MPLL, the controller may require some magic setting to
be applied on startup.
This is needed when the initial setting is not applied by the boot ROM.
The controller need to do it when the setting applies to several clock,
like all the MPLLs in the case of g12a.
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Diffstat (limited to 'drivers/clk/meson/meson-eeclk.c')
| -rw-r--r-- | drivers/clk/meson/meson-eeclk.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/clk/meson/meson-eeclk.c b/drivers/clk/meson/meson-eeclk.c index 37a34c9c3885..6ba2094be257 100644 --- a/drivers/clk/meson/meson-eeclk.c +++ b/drivers/clk/meson/meson-eeclk.c @@ -34,6 +34,9 @@ int meson_eeclkc_probe(struct platform_device *pdev) return PTR_ERR(map); } + if (data->init_count) + regmap_multi_reg_write(map, data->init_regs, data->init_count); + input = meson_clk_hw_register_input(dev, "xtal", IN_PREFIX "xtal", 0); if (IS_ERR(input)) { ret = PTR_ERR(input); |