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authorNick Xie <nick@khadas.com>2021-06-04 11:29:57 +0800
committerJerome Brunet <jbrunet@baylibre.com>2021-06-09 21:39:50 +0200
commit8271813e404cd0620f99fbccffd2746f85a17259 (patch)
treefdc82fb7f94616ba7d330bbec2028159cbb62e0d /drivers/clk/meson
parent50cb321f16f6665873071792d89ab8563be1658d (diff)
clk: meson: g12a: Add missing NNA source clocks for g12b
This adds the Neural Network Accelerator source clocks for g12b. Initial support for sm1 already exist in commit 2f1efa5340ef ("clk: meson: g12a: Add support for NNA CLK source clocks") The sm1 and g12b share the same NNA source clocks. This patch add missing NNA clocks for A311D (g12b). Signed-off-by: Nick Xie <nick@khadas.com> Acked-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Link: https://lore.kernel.org/r/20210604032957.224496-1-xieqinick@gmail.com
Diffstat (limited to 'drivers/clk/meson')
-rw-r--r--drivers/clk/meson/g12a.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/clk/meson/g12a.c b/drivers/clk/meson/g12a.c
index a805bac93c11..310accf94830 100644
--- a/drivers/clk/meson/g12a.c
+++ b/drivers/clk/meson/g12a.c
@@ -4723,6 +4723,12 @@ static struct clk_hw_onecell_data g12b_hw_onecell_data = {
[CLKID_SPICC1_SCLK_SEL] = &g12a_spicc1_sclk_sel.hw,
[CLKID_SPICC1_SCLK_DIV] = &g12a_spicc1_sclk_div.hw,
[CLKID_SPICC1_SCLK] = &g12a_spicc1_sclk.hw,
+ [CLKID_NNA_AXI_CLK_SEL] = &sm1_nna_axi_clk_sel.hw,
+ [CLKID_NNA_AXI_CLK_DIV] = &sm1_nna_axi_clk_div.hw,
+ [CLKID_NNA_AXI_CLK] = &sm1_nna_axi_clk.hw,
+ [CLKID_NNA_CORE_CLK_SEL] = &sm1_nna_core_clk_sel.hw,
+ [CLKID_NNA_CORE_CLK_DIV] = &sm1_nna_core_clk_div.hw,
+ [CLKID_NNA_CORE_CLK] = &sm1_nna_core_clk.hw,
[CLKID_MIPI_DSI_PXCLK_SEL] = &g12a_mipi_dsi_pxclk_sel.hw,
[CLKID_MIPI_DSI_PXCLK_DIV] = &g12a_mipi_dsi_pxclk_div.hw,
[CLKID_MIPI_DSI_PXCLK] = &g12a_mipi_dsi_pxclk.hw,