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authorDmitry Baryshkov <dmitry.baryshkov@linaro.org>2021-12-28 07:54:03 +0300
committerBjorn Andersson <bjorn.andersson@linaro.org>2022-02-10 18:33:30 -0600
commit3ca90171215619fa598a1dd8a3077cf01b8c74d1 (patch)
tree62dbaf775bac0f91a9f0ff9218fa6a68f26bd7e8 /drivers/clk/qcom
parentba9b57dcac4f33bd836e64bbb9591d9adeb369d2 (diff)
clk: qcom: camcc-sc7180: use ARRAY_SIZE instead of specifying num_parents
Use ARRAY_SIZE() instead of manually specifying num_parents. This makes adding/removing entries to/from parent_data easy and errorproof. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211228045415.20543-5-dmitry.baryshkov@linaro.org
Diffstat (limited to 'drivers/clk/qcom')
-rw-r--r--drivers/clk/qcom/camcc-sc7180.c50
1 files changed, 25 insertions, 25 deletions
diff --git a/drivers/clk/qcom/camcc-sc7180.c b/drivers/clk/qcom/camcc-sc7180.c
index ce73ee9037cb..f6e303976a0d 100644
--- a/drivers/clk/qcom/camcc-sc7180.c
+++ b/drivers/clk/qcom/camcc-sc7180.c
@@ -303,7 +303,7 @@ static struct clk_rcg2 cam_cc_bps_clk_src = {
.clkr.hw.init = &(struct clk_init_data){
.name = "cam_cc_bps_clk_src",
.parent_data = cam_cc_parent_data_2,
- .num_parents = 5,
+ .num_parents = ARRAY_SIZE(cam_cc_parent_data_2),
.ops = &clk_rcg2_shared_ops,
},
};
@@ -324,7 +324,7 @@ static struct clk_rcg2 cam_cc_cci_0_clk_src = {
.clkr.hw.init = &(struct clk_init_data){
.name = "cam_cc_cci_0_clk_src",
.parent_data = cam_cc_parent_data_5,
- .num_parents = 3,
+ .num_parents = ARRAY_SIZE(cam_cc_parent_data_5),
.ops = &clk_rcg2_shared_ops,
},
};
@@ -338,7 +338,7 @@ static struct clk_rcg2 cam_cc_cci_1_clk_src = {
.clkr.hw.init = &(struct clk_init_data){
.name = "cam_cc_cci_1_clk_src",
.parent_data = cam_cc_parent_data_5,
- .num_parents = 3,
+ .num_parents = ARRAY_SIZE(cam_cc_parent_data_5),
.ops = &clk_rcg2_shared_ops,
},
};
@@ -359,7 +359,7 @@ static struct clk_rcg2 cam_cc_cphy_rx_clk_src = {
.clkr.hw.init = &(struct clk_init_data){
.name = "cam_cc_cphy_rx_clk_src",
.parent_data = cam_cc_parent_data_3,
- .num_parents = 6,
+ .num_parents = ARRAY_SIZE(cam_cc_parent_data_3),
.ops = &clk_rcg2_shared_ops,
},
};
@@ -378,7 +378,7 @@ static struct clk_rcg2 cam_cc_csi0phytimer_clk_src = {
.clkr.hw.init = &(struct clk_init_data){
.name = "cam_cc_csi0phytimer_clk_src",
.parent_data = cam_cc_parent_data_0,
- .num_parents = 4,
+ .num_parents = ARRAY_SIZE(cam_cc_parent_data_0),
.ops = &clk_rcg2_shared_ops,
},
};
@@ -392,7 +392,7 @@ static struct clk_rcg2 cam_cc_csi1phytimer_clk_src = {
.clkr.hw.init = &(struct clk_init_data){
.name = "cam_cc_csi1phytimer_clk_src",
.parent_data = cam_cc_parent_data_0,
- .num_parents = 4,
+ .num_parents = ARRAY_SIZE(cam_cc_parent_data_0),
.ops = &clk_rcg2_shared_ops,
},
};
@@ -406,7 +406,7 @@ static struct clk_rcg2 cam_cc_csi2phytimer_clk_src = {
.clkr.hw.init = &(struct clk_init_data){
.name = "cam_cc_csi2phytimer_clk_src",
.parent_data = cam_cc_parent_data_0,
- .num_parents = 4,
+ .num_parents = ARRAY_SIZE(cam_cc_parent_data_0),
.ops = &clk_rcg2_shared_ops,
},
};
@@ -420,7 +420,7 @@ static struct clk_rcg2 cam_cc_csi3phytimer_clk_src = {
.clkr.hw.init = &(struct clk_init_data){
.name = "cam_cc_csi3phytimer_clk_src",
.parent_data = cam_cc_parent_data_0,
- .num_parents = 4,
+ .num_parents = ARRAY_SIZE(cam_cc_parent_data_0),
.ops = &clk_rcg2_shared_ops,
},
};
@@ -442,7 +442,7 @@ static struct clk_rcg2 cam_cc_fast_ahb_clk_src = {
.clkr.hw.init = &(struct clk_init_data){
.name = "cam_cc_fast_ahb_clk_src",
.parent_data = cam_cc_parent_data_0,
- .num_parents = 4,
+ .num_parents = ARRAY_SIZE(cam_cc_parent_data_0),
.ops = &clk_rcg2_shared_ops,
},
};
@@ -465,7 +465,7 @@ static struct clk_rcg2 cam_cc_icp_clk_src = {
.clkr.hw.init = &(struct clk_init_data){
.name = "cam_cc_icp_clk_src",
.parent_data = cam_cc_parent_data_2,
- .num_parents = 5,
+ .num_parents = ARRAY_SIZE(cam_cc_parent_data_2),
.ops = &clk_rcg2_shared_ops,
},
};
@@ -487,7 +487,7 @@ static struct clk_rcg2 cam_cc_ife_0_clk_src = {
.clkr.hw.init = &(struct clk_init_data){
.name = "cam_cc_ife_0_clk_src",
.parent_data = cam_cc_parent_data_4,
- .num_parents = 4,
+ .num_parents = ARRAY_SIZE(cam_cc_parent_data_4),
.ops = &clk_rcg2_shared_ops,
},
};
@@ -509,7 +509,7 @@ static struct clk_rcg2 cam_cc_ife_0_csid_clk_src = {
.clkr.hw.init = &(struct clk_init_data){
.name = "cam_cc_ife_0_csid_clk_src",
.parent_data = cam_cc_parent_data_3,
- .num_parents = 6,
+ .num_parents = ARRAY_SIZE(cam_cc_parent_data_3),
.ops = &clk_rcg2_shared_ops,
},
};
@@ -523,7 +523,7 @@ static struct clk_rcg2 cam_cc_ife_1_clk_src = {
.clkr.hw.init = &(struct clk_init_data){
.name = "cam_cc_ife_1_clk_src",
.parent_data = cam_cc_parent_data_4,
- .num_parents = 4,
+ .num_parents = ARRAY_SIZE(cam_cc_parent_data_4),
.ops = &clk_rcg2_shared_ops,
},
};
@@ -537,7 +537,7 @@ static struct clk_rcg2 cam_cc_ife_1_csid_clk_src = {
.clkr.hw.init = &(struct clk_init_data){
.name = "cam_cc_ife_1_csid_clk_src",
.parent_data = cam_cc_parent_data_3,
- .num_parents = 6,
+ .num_parents = ARRAY_SIZE(cam_cc_parent_data_3),
.ops = &clk_rcg2_shared_ops,
},
};
@@ -551,7 +551,7 @@ static struct clk_rcg2 cam_cc_ife_lite_clk_src = {
.clkr.hw.init = &(struct clk_init_data){
.name = "cam_cc_ife_lite_clk_src",
.parent_data = cam_cc_parent_data_4,
- .num_parents = 4,
+ .num_parents = ARRAY_SIZE(cam_cc_parent_data_4),
.flags = CLK_SET_RATE_PARENT,
.ops = &clk_rcg2_shared_ops,
},
@@ -566,7 +566,7 @@ static struct clk_rcg2 cam_cc_ife_lite_csid_clk_src = {
.clkr.hw.init = &(struct clk_init_data){
.name = "cam_cc_ife_lite_csid_clk_src",
.parent_data = cam_cc_parent_data_3,
- .num_parents = 6,
+ .num_parents = ARRAY_SIZE(cam_cc_parent_data_3),
.ops = &clk_rcg2_shared_ops,
},
};
@@ -589,7 +589,7 @@ static struct clk_rcg2 cam_cc_ipe_0_clk_src = {
.clkr.hw.init = &(struct clk_init_data){
.name = "cam_cc_ipe_0_clk_src",
.parent_data = cam_cc_parent_data_2,
- .num_parents = 5,
+ .num_parents = ARRAY_SIZE(cam_cc_parent_data_2),
.ops = &clk_rcg2_shared_ops,
},
};
@@ -612,7 +612,7 @@ static struct clk_rcg2 cam_cc_jpeg_clk_src = {
.clkr.hw.init = &(struct clk_init_data){
.name = "cam_cc_jpeg_clk_src",
.parent_data = cam_cc_parent_data_2,
- .num_parents = 5,
+ .num_parents = ARRAY_SIZE(cam_cc_parent_data_2),
.ops = &clk_rcg2_shared_ops,
},
};
@@ -634,7 +634,7 @@ static struct clk_rcg2 cam_cc_lrme_clk_src = {
.clkr.hw.init = &(struct clk_init_data){
.name = "cam_cc_lrme_clk_src",
.parent_data = cam_cc_parent_data_6,
- .num_parents = 5,
+ .num_parents = ARRAY_SIZE(cam_cc_parent_data_6),
.ops = &clk_rcg2_shared_ops,
},
};
@@ -655,7 +655,7 @@ static struct clk_rcg2 cam_cc_mclk0_clk_src = {
.clkr.hw.init = &(struct clk_init_data){
.name = "cam_cc_mclk0_clk_src",
.parent_data = cam_cc_parent_data_1,
- .num_parents = 3,
+ .num_parents = ARRAY_SIZE(cam_cc_parent_data_1),
.ops = &clk_rcg2_shared_ops,
},
};
@@ -669,7 +669,7 @@ static struct clk_rcg2 cam_cc_mclk1_clk_src = {
.clkr.hw.init = &(struct clk_init_data){
.name = "cam_cc_mclk1_clk_src",
.parent_data = cam_cc_parent_data_1,
- .num_parents = 3,
+ .num_parents = ARRAY_SIZE(cam_cc_parent_data_1),
.ops = &clk_rcg2_shared_ops,
},
};
@@ -683,7 +683,7 @@ static struct clk_rcg2 cam_cc_mclk2_clk_src = {
.clkr.hw.init = &(struct clk_init_data){
.name = "cam_cc_mclk2_clk_src",
.parent_data = cam_cc_parent_data_1,
- .num_parents = 3,
+ .num_parents = ARRAY_SIZE(cam_cc_parent_data_1),
.ops = &clk_rcg2_shared_ops,
},
};
@@ -697,7 +697,7 @@ static struct clk_rcg2 cam_cc_mclk3_clk_src = {
.clkr.hw.init = &(struct clk_init_data){
.name = "cam_cc_mclk3_clk_src",
.parent_data = cam_cc_parent_data_1,
- .num_parents = 3,
+ .num_parents = ARRAY_SIZE(cam_cc_parent_data_1),
.ops = &clk_rcg2_shared_ops,
},
};
@@ -711,7 +711,7 @@ static struct clk_rcg2 cam_cc_mclk4_clk_src = {
.clkr.hw.init = &(struct clk_init_data){
.name = "cam_cc_mclk4_clk_src",
.parent_data = cam_cc_parent_data_1,
- .num_parents = 3,
+ .num_parents = ARRAY_SIZE(cam_cc_parent_data_1),
.ops = &clk_rcg2_shared_ops,
},
};
@@ -730,7 +730,7 @@ static struct clk_rcg2 cam_cc_slow_ahb_clk_src = {
.clkr.hw.init = &(struct clk_init_data){
.name = "cam_cc_slow_ahb_clk_src",
.parent_data = cam_cc_parent_data_0,
- .num_parents = 4,
+ .num_parents = ARRAY_SIZE(cam_cc_parent_data_0),
.flags = CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE,
.ops = &clk_rcg2_shared_ops,
},