diff options
| author | Ulrich Hecht <uli+renesas@fpond.eu> | 2020-06-16 18:26:25 +0200 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2020-06-22 16:53:49 +0200 |
| commit | f23f1101ad0ef1acdc219d3364522166e2c711ce (patch) | |
| tree | 11a927463c7d9291f83f0d18a93f4fc04d138010 /drivers/clk/renesas/r8a7795-cpg-mssr.c | |
| parent | ed4a11807d2a35ccfc0d00371f20b826f670b5f2 (diff) | |
clk: renesas: rcar-gen3: Mark RWDT clocks as critical
Ensures RWDT remains alert throughout the boot process if enabled.
This patch applies the change to the following SoCs: r8a77950, r8a77951,
r8a77960, r8a77961, r8a77965, r8a77970, r8a77980, r8a77990 and r8a77995.
Signed-off-by: Ulrich Hecht <uli+renesas@fpond.eu>
Link: https://lore.kernel.org/r/20200616162626.27944-3-uli+renesas@fpond.eu
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'drivers/clk/renesas/r8a7795-cpg-mssr.c')
| -rw-r--r-- | drivers/clk/renesas/r8a7795-cpg-mssr.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/clk/renesas/r8a7795-cpg-mssr.c b/drivers/clk/renesas/r8a7795-cpg-mssr.c index ff5b3020cb03..068018ae3c6e 100644 --- a/drivers/clk/renesas/r8a7795-cpg-mssr.c +++ b/drivers/clk/renesas/r8a7795-cpg-mssr.c @@ -287,10 +287,10 @@ static struct mssr_mod_clk r8a7795_mod_clks[] __initdata = { }; static const unsigned int r8a7795_crit_mod_clks[] __initconst = { + MOD_CLK_ID(402), /* RWDT */ MOD_CLK_ID(408), /* INTC-AP (GIC) */ }; - /* * CPG Clock Data */ |