diff options
| author | Finley Xiao <finley.xiao@rock-chips.com> | 2019-09-17 10:19:00 +0200 |
|---|---|---|
| committer | Heiko Stuebner <heiko.stuebner@theobroma-systems.com> | 2019-11-05 20:53:30 +0100 |
| commit | e40781098f56dab52e92b7651d87b38805536d28 (patch) | |
| tree | b73483ceda7fad8ef883368561207beebedcb127 /drivers/clk/rockchip/clk-muxgrf.c | |
| parent | 762539d6999caa1d9a916a4ce72004977b2433cf (diff) | |
clk: rockchip: Add div50 clocks for px30 sdmmc, emmc, sdio and nandc
Some IPs, such as NAND, EMMC, SDIO and SDMMC need clock of 50% duty
cycle, divfree50 can generate clock of 50% duty cycle even in odd
value divisor.
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://lore.kernel.org/r/20190917081903.25139-2-heiko@sntech.de
Diffstat (limited to 'drivers/clk/rockchip/clk-muxgrf.c')
0 files changed, 0 insertions, 0 deletions