diff options
author | Dinh Nguyen <dinguyen@kernel.org> | 2020-01-14 10:07:26 -0600 |
---|---|---|
committer | Stephen Boyd <sboyd@kernel.org> | 2020-02-12 15:42:04 -0800 |
commit | 8c0e783d2c7be2bb75bf233574a3f1ad1e818cb1 (patch) | |
tree | 0cd623e6bf06291bd57dd24141fd67c1a8ad7854 /drivers/clk/socfpga/clk-pll-s10.c | |
parent | cc26ed7be46c5f5fa45f3df8161ed7ca3c4d318c (diff) |
clk: socfpga: stratix10: simplify parameter passing
Just pass the clock pointer structure to the various register functions.
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Link: https://lkml.kernel.org/r/20200114160726.19771-2-dinguyen@kernel.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'drivers/clk/socfpga/clk-pll-s10.c')
-rw-r--r-- | drivers/clk/socfpga/clk-pll-s10.c | 13 |
1 files changed, 7 insertions, 6 deletions
diff --git a/drivers/clk/socfpga/clk-pll-s10.c b/drivers/clk/socfpga/clk-pll-s10.c index 8d7b1d0c4664..a301bb22f36c 100644 --- a/drivers/clk/socfpga/clk-pll-s10.c +++ b/drivers/clk/socfpga/clk-pll-s10.c @@ -110,19 +110,20 @@ static struct clk_ops clk_boot_ops = { .prepare = clk_pll_prepare, }; -struct clk *s10_register_pll(const char *name, const char * const *parent_names, - u8 num_parents, unsigned long flags, - void __iomem *reg, unsigned long offset) +struct clk *s10_register_pll(const struct stratix10_pll_clock *clks, + void __iomem *reg) { struct clk *clk; struct socfpga_pll *pll_clk; struct clk_init_data init; + const char *name = clks->name; + const char * const *parent_names = clks->parent_names; pll_clk = kzalloc(sizeof(*pll_clk), GFP_KERNEL); if (WARN_ON(!pll_clk)) return NULL; - pll_clk->hw.reg = reg + offset; + pll_clk->hw.reg = reg + clks->offset; if (streq(name, SOCFPGA_BOOT_CLK)) init.ops = &clk_boot_ops; @@ -130,9 +131,9 @@ struct clk *s10_register_pll(const char *name, const char * const *parent_names, init.ops = &clk_pll_ops; init.name = name; - init.flags = flags; + init.flags = clks->flags; - init.num_parents = num_parents; + init.num_parents = clks->num_parents; init.parent_names = parent_names; pll_clk->hw.hw.init = &init; |