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authorViresh Kumar <viresh.kumar@st.com>2012-04-11 18:04:23 +0530
committerArnd Bergmann <arnd@arndb.de>2012-05-12 21:19:27 +0200
commit270b9f421e66ee5d135c99ba1c2b883c7750ab6c (patch)
tree8cc17279410af8a36edd9c866ac2c7b98bb93ac2 /drivers/clk/spear/Makefile
parent5335a639ecc5646cbe8e99086fb7e743b801ac58 (diff)
SPEAr: clk: Add Fractional Synthesizer clock
All SPEAr SoC's contain Fractional Synthesizers. Their Fout is derived from following equations: Fout = Fin / (2 * div) (division factor) div is 17 bits:- 0-13 (fractional part) 14-16 (integer part) div is (16-14 bits).(13-0 bits) (in binary) Fout = Fin/(2 * div) Fout = ((Fin / 10000)/(2 * div)) * 10000 Fout = (2^14 * (Fin / 10000)/(2^14 * (2 * div))) * 10000 Fout = (((Fin / 10000) << 14)/(2 * (div << 14))) * 10000 div << 14 is simply 17 bit value written at register. This patch adds in support for this type of clock. Signed-off-by: Viresh Kumar <viresh.kumar@st.com> Reviewed-by: Mike Turquette <mturquette@linaro.org>
Diffstat (limited to 'drivers/clk/spear/Makefile')
-rw-r--r--drivers/clk/spear/Makefile2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/clk/spear/Makefile b/drivers/clk/spear/Makefile
index e36d8c665724..182703622195 100644
--- a/drivers/clk/spear/Makefile
+++ b/drivers/clk/spear/Makefile
@@ -2,4 +2,4 @@
# SPEAr Clock specific Makefile
#
-obj-y += clk.o clk-aux-synth.o clk-vco-pll.o
+obj-y += clk.o clk-aux-synth.o clk-frac-synth.o clk-vco-pll.o