diff options
| author | Emil Renner Berthing <kernel@esmil.dk> | 2023-04-01 19:19:24 +0800 |
|---|---|---|
| committer | Conor Dooley <conor.dooley@microchip.com> | 2023-04-05 15:44:07 +0100 |
| commit | b6d7406cd7a199fabf93008e9fc0aa0358695a79 (patch) | |
| tree | ac6fd89e8f91a5a38c1fcdaf5ba47110e3f61713 /drivers/clk/starfive/clk-starfive-jh7110-sys.c | |
| parent | 0333103ee96069a7a53d8f599e70d86d4c18a53c (diff) | |
reset: starfive: jh71x0: Use 32bit I/O on 32bit registers
We currently use 64bit I/O on the 32bit registers. This works because
there are an even number of assert and status registers, so they're only
ever accessed in pairs on 64bit boundaries.
There are however other reset controllers for audio and video on the
JH7100 SoC with only one status register that isn't 64bit aligned so
64bit I/O results in an unaligned access exception.
Switch to 32bit I/O in preparation for supporting these resets too.
Tested-by: Tommaso Merciai <tomm.merciai@gmail.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Diffstat (limited to 'drivers/clk/starfive/clk-starfive-jh7110-sys.c')
0 files changed, 0 insertions, 0 deletions