diff options
author | Gabriel Fernandez <gabriel.fernandez@foss.st.com> | 2022-05-16 09:05:53 +0200 |
---|---|---|
committer | Stephen Boyd <sboyd@kernel.org> | 2022-05-20 21:07:49 -0700 |
commit | 93e336c2d6d11c37c22823c7219866e06fd0276b (patch) | |
tree | 511ff651ce11b8ec9b48d88e884c5d355c4d7e45 /drivers/clk/stm32/clk-stm32-core.h | |
parent | 5f0d47213f52c0623b3ce662c924575b2ba718ae (diff) |
clk: stm32mp13: manage secured clocks
Don't register a clock if this clock is secured.
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
Link: https://lore.kernel.org/r/20220516070600.7692-8-gabriel.fernandez@foss.st.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'drivers/clk/stm32/clk-stm32-core.h')
-rw-r--r-- | drivers/clk/stm32/clk-stm32-core.h | 22 |
1 files changed, 13 insertions, 9 deletions
diff --git a/drivers/clk/stm32/clk-stm32-core.h b/drivers/clk/stm32/clk-stm32-core.h index 6c5c8c08ecbf..5f4c81cce170 100644 --- a/drivers/clk/stm32/clk-stm32-core.h +++ b/drivers/clk/stm32/clk-stm32-core.h @@ -46,6 +46,7 @@ struct stm32_composite_cfg { struct clock_config { unsigned long id; + int sec_id; void *clock_cfg; struct clk_hw *(*func)(struct device *dev, @@ -69,6 +70,8 @@ struct stm32_rcc_match_data { unsigned int maxbinding; struct clk_stm32_clock_data *clock_data; u32 clear_offset; + int (*check_security)(void __iomem *base, + const struct clock_config *cfg); }; int stm32_rcc_reset_init(struct device *dev, const struct of_device_id *match, @@ -157,25 +160,26 @@ struct clk_hw *clk_stm32_composite_register(struct device *dev, spinlock_t *lock, const struct clock_config *cfg); -#define STM32_CLOCK_CFG(_binding, _clk, _struct, _register)\ +#define STM32_CLOCK_CFG(_binding, _clk, _sec_id, _struct, _register)\ {\ .id = (_binding),\ + .sec_id = (_sec_id),\ .clock_cfg = (_struct) {_clk},\ .func = (_register),\ } -#define STM32_MUX_CFG(_binding, _clk)\ - STM32_CLOCK_CFG(_binding, &(_clk), struct clk_stm32_mux *,\ +#define STM32_MUX_CFG(_binding, _clk, _sec_id)\ + STM32_CLOCK_CFG(_binding, &(_clk), _sec_id, struct clk_stm32_mux *,\ &clk_stm32_mux_register) -#define STM32_GATE_CFG(_binding, _clk)\ - STM32_CLOCK_CFG(_binding, &(_clk), struct clk_stm32_gate *,\ +#define STM32_GATE_CFG(_binding, _clk, _sec_id)\ + STM32_CLOCK_CFG(_binding, &(_clk), _sec_id, struct clk_stm32_gate *,\ &clk_stm32_gate_register) -#define STM32_DIV_CFG(_binding, _clk)\ - STM32_CLOCK_CFG(_binding, &(_clk), struct clk_stm32_div *,\ +#define STM32_DIV_CFG(_binding, _clk, _sec_id)\ + STM32_CLOCK_CFG(_binding, &(_clk), _sec_id, struct clk_stm32_div *,\ &clk_stm32_div_register) -#define STM32_COMPOSITE_CFG(_binding, _clk)\ - STM32_CLOCK_CFG(_binding, &(_clk), struct clk_stm32_composite *,\ +#define STM32_COMPOSITE_CFG(_binding, _clk, _sec_id)\ + STM32_CLOCK_CFG(_binding, &(_clk), _sec_id, struct clk_stm32_composite *,\ &clk_stm32_composite_register) |