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author | Stephen Boyd <sboyd@codeaurora.org> | 2017-08-23 15:28:52 -0700 |
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committer | Stephen Boyd <sboyd@codeaurora.org> | 2017-08-23 15:28:52 -0700 |
commit | 3477a72b41f3515913f7da704965884ca51b4352 (patch) | |
tree | a1ec371bcdcedd1bb3c0ee19d4f109d6f1a4a474 /drivers/clk/sunxi-ng | |
parent | e66d57a92ee249f53691c8c33da81da91f651e14 (diff) | |
parent | 62ec0b9754aced0b4c02694886cbe9bfd3d00f2f (diff) |
Merge tag 'meson-clk-for-4.14' of git://github.com/baylibre/clk-meson into clk-next
Pull Amlogic clock driver updates from Neil Armstrong:
* meson8b: add the reset controller to the clkc
* meson: expose all clk ids
* gxbb-aoclk: Add CEC 32k clock
* gxbb: add mmc input 0 clocks
* meson: fix protection against undefined clks
* gxbb: fix audio divider flags
* tag 'meson-clk-for-4.14' of git://github.com/baylibre/clk-meson:
clk: meson: gxbb-aoclk: Add CEC 32k clock
clk: meson: gxbb-aoclk: Switch to regmap for register access
dt-bindings: clock: amlogic, gxbb-aoclkc: Update bindings
clk: meson: gxbb: Add sd_emmc clk0 clocks
clk: meson: gxbb: fix clk_mclk_i958 divider flags
clk: meson: gxbb: fix meson cts_amclk divider flags
clk: meson: meson8b: register the built-in reset controller
dt-bindings: clock: gxbb-aoclk: Add CEC 32k clock
clk: meson: gxbb: Add sd_emmc clk0 clkids
clk: meson-gxbb: expose almost every clock in the bindings
clk: meson8b: expose every clock in the bindings
clk: meson: gxbb: fix protection against undefined clks
clk: meson: meson8b: fix protection against undefined clks
dt-bindings: clock: meson8b: describe the embedded reset controller
Diffstat (limited to 'drivers/clk/sunxi-ng')
0 files changed, 0 insertions, 0 deletions