diff options
| author | Vasily Khoruzhick <anarsoul@gmail.com> | 2020-01-03 22:35:04 -0800 |
|---|---|---|
| committer | Maxime Ripard <maxime@cerno.tech> | 2020-01-04 09:18:08 +0100 |
| commit | a9b5c6717837840adc5d58ab75f232905a3af9f7 (patch) | |
| tree | a663f0bacf50df0b4f7dcf953da63a2a6e163cff /drivers/clk/sunxi-ng | |
| parent | ec97faff743b398e21f74a54c81333f3390093aa (diff) | |
clk: sunxi-ng: a64: export CLK_CPUX clock for DVFS
Export CLK_CPUX so we can reference it in CPU node.
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Diffstat (limited to 'drivers/clk/sunxi-ng')
| -rw-r--r-- | drivers/clk/sunxi-ng/ccu-sun50i-a64.h | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/drivers/clk/sunxi-ng/ccu-sun50i-a64.h b/drivers/clk/sunxi-ng/ccu-sun50i-a64.h index 979929276709..116e6f826d04 100644 --- a/drivers/clk/sunxi-ng/ccu-sun50i-a64.h +++ b/drivers/clk/sunxi-ng/ccu-sun50i-a64.h @@ -36,7 +36,6 @@ #define CLK_PLL_HSIC 18 #define CLK_PLL_DE 19 #define CLK_PLL_DDR1 20 -#define CLK_CPUX 21 #define CLK_AXI 22 #define CLK_APB 23 #define CLK_AHB1 24 |