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authorRajan Vaja <rajan.vaja@xilinx.com>2021-06-28 00:01:22 -0700
committerStephen Boyd <sboyd@kernel.org>2021-06-28 23:35:37 -0700
commit03aea91bbe06d4ffae8c22c9e1e6671a76fd6d5a (patch)
treebb55e7339dd95412251097288044898a730ca6c9 /drivers/clk/zynqmp
parent54530ed17d1cc096f9ab0319001c96a63f772c62 (diff)
clk: zynqmp: Handle divider specific read only flag
Add support for divider specific read only CCF flag (CLK_DIVIDER_READ_ONLY). Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com> Link: https://lore.kernel.org/r/20210628070122.26217-5-rajan.vaja@xilinx.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'drivers/clk/zynqmp')
-rw-r--r--drivers/clk/zynqmp/divider.c10
1 files changed, 9 insertions, 1 deletions
diff --git a/drivers/clk/zynqmp/divider.c b/drivers/clk/zynqmp/divider.c
index c07423e03bc8..cb49281f9cf9 100644
--- a/drivers/clk/zynqmp/divider.c
+++ b/drivers/clk/zynqmp/divider.c
@@ -256,6 +256,11 @@ static const struct clk_ops zynqmp_clk_divider_ops = {
.set_rate = zynqmp_clk_divider_set_rate,
};
+static const struct clk_ops zynqmp_clk_divider_ro_ops = {
+ .recalc_rate = zynqmp_clk_divider_recalc_rate,
+ .round_rate = zynqmp_clk_divider_round_rate,
+};
+
/**
* zynqmp_clk_get_max_divisor() - Get maximum supported divisor from firmware.
* @clk_id: Id of clock
@@ -334,7 +339,10 @@ struct clk_hw *zynqmp_clk_register_divider(const char *name,
return ERR_PTR(-ENOMEM);
init.name = name;
- init.ops = &zynqmp_clk_divider_ops;
+ if (nodes->type_flag & CLK_DIVIDER_READ_ONLY)
+ init.ops = &zynqmp_clk_divider_ro_ops;
+ else
+ init.ops = &zynqmp_clk_divider_ops;
init.flags = zynqmp_clk_map_common_ccf_flags(nodes->flag);