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authorPeng Fan <peng.fan@nxp.com>2019-11-01 10:16:19 +0000
committerShawn Guo <shawnguo@kernel.org>2019-12-09 08:27:06 +0800
commit073a01e8d7c23b3efb59a3d4c20aa546f9ec29a9 (patch)
treea87edacfe05c270e62ab8ab5adb87e617c66c8b7 /drivers/clk
parente42617b825f8073569da76dc4510bfa019b1c35a (diff)
clk: imx: clk-composite-8m: add lock to gate/mux
There is a lock to divider in the composite driver, but that's not enough. lock to gate/mux are also needed to provide exclusive access to the register. Fixes: d3ff9728134e ("clk: imx: Add imx composite clock") Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: <stable@vger.kernel.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'drivers/clk')
-rw-r--r--drivers/clk/imx/clk-composite-8m.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/clk/imx/clk-composite-8m.c b/drivers/clk/imx/clk-composite-8m.c
index 388bdb94f841..d3486ee79ab5 100644
--- a/drivers/clk/imx/clk-composite-8m.c
+++ b/drivers/clk/imx/clk-composite-8m.c
@@ -142,6 +142,7 @@ struct clk *imx8m_clk_composite_flags(const char *name,
mux->reg = reg;
mux->shift = PCG_PCS_SHIFT;
mux->mask = PCG_PCS_MASK;
+ mux->lock = &imx_ccm_lock;
div = kzalloc(sizeof(*div), GFP_KERNEL);
if (!div)
@@ -161,6 +162,7 @@ struct clk *imx8m_clk_composite_flags(const char *name,
gate_hw = &gate->hw;
gate->reg = reg;
gate->bit_idx = PCG_CGC_SHIFT;
+ gate->lock = &imx_ccm_lock;
hw = clk_hw_register_composite(NULL, name, parent_names, num_parents,
mux_hw, &clk_mux_ops, div_hw,