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| author | Arnd Bergmann <arnd@arndb.de> | 2020-04-03 22:45:37 +0200 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2020-04-03 22:45:37 +0200 |
| commit | 8bdbf169084ec00833bff61cda0014b7fbdf15ac (patch) | |
| tree | 649873efdce0f9b81d22c8bd042d669bce6c8720 /drivers/clk | |
| parent | fdd41faca6de75737e3cb4a0e86f0723ce36c242 (diff) | |
| parent | 56effbdd2cecd055aef547ed76da83df6fd68d3b (diff) | |
Merge branch 'arm/late' into arm/dt
Include originally "late" updates for OMAP and Qualcomm,
now that it's not late any more.
* arm/late: (122 commits)
ARM: OMAP2+: Drop legacy platform data for ti81xx edma
ARM: dts: Configure interconnect target module for ti816x edma
ARM: dts: Configure interconnect target module for dm814x tptc3
ARM: dts: Configure interconnect target module for dm814x tptc2
ARM: dts: Configure interconnect target module for dm814x tptc1
ARM: dts: Configure interconnect target module for dm814x tptc0
ARM: dts: Configure interconnect target module for dm814x tpcc
ARM: OMAP2+: Drop legacy platform data for dm814x cpsw
ARM: dts: Configure interconnect target module for dm814x cpsw
clk: ti: Fix dm814x clkctrl for ethernet
arm64: dts: qcom: sdm845-mtp: Relocate remoteproc firmware
arm64: dts: sdm845: add IPA information
arm64: dts: qcom: db845c: add analog audio support
arm64: dts: qcom: sdm845: add pinctrl nodes for quat i2s
arm64: dts: qcom: c630: Enable audio support
arm64: dts: qcom: sdm845: add apr nodes
arm64: dts: qcom: sdm845: add slimbus nodes
arm64: dts: qcom: sc7180: Update reg names for SDHC
arm64: dts: qcom: qcs404: Enable CQE support for eMMC
arm64: dts: msm8916: Add fastrpc node
...
Diffstat (limited to 'drivers/clk')
| -rw-r--r-- | drivers/clk/ti/clk-814x.c | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/drivers/clk/ti/clk-814x.c b/drivers/clk/ti/clk-814x.c index 087cfa75ac24..4f8bd34ec1a5 100644 --- a/drivers/clk/ti/clk-814x.c +++ b/drivers/clk/ti/clk-814x.c @@ -25,7 +25,6 @@ static const struct omap_clkctrl_reg_data dm814_alwon_clkctrl_regs[] __initconst { DM814_WD_TIMER_CLKCTRL, NULL, CLKF_SW_SUP | CLKF_NO_IDLEST, "sysclk18_ck" }, { DM814_MCSPI1_CLKCTRL, NULL, CLKF_SW_SUP, "sysclk10_ck" }, { DM814_GPMC_CLKCTRL, NULL, CLKF_SW_SUP, "sysclk6_ck" }, - { DM814_CPGMAC0_CLKCTRL, NULL, CLKF_SW_SUP, "cpsw_125mhz_gclk" }, { DM814_MPU_CLKCTRL, NULL, CLKF_SW_SUP, "mpu_ck" }, { DM814_RTC_CLKCTRL, NULL, CLKF_SW_SUP | CLKF_NO_IDLEST, "sysclk18_ck" }, { DM814_TPCC_CLKCTRL, NULL, CLKF_SW_SUP, "sysclk4_ck" }, @@ -39,9 +38,15 @@ static const struct omap_clkctrl_reg_data dm814_alwon_clkctrl_regs[] __initconst { 0 }, }; +static const struct +omap_clkctrl_reg_data dm814_alwon_ethernet_clkctrl_regs[] __initconst = { + { 0, NULL, CLKF_SW_SUP, "cpsw_125mhz_gclk" }, +}; + const struct omap_clkctrl_data dm814_clkctrl_data[] __initconst = { { 0x48180500, dm814_default_clkctrl_regs }, { 0x48181400, dm814_alwon_clkctrl_regs }, + { 0x481815d4, dm814_alwon_ethernet_clkctrl_regs }, { 0 }, }; |