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authorArnd Bergmann <arnd@arndb.de>2018-03-09 17:41:49 +0100
committerArnd Bergmann <arnd@arndb.de>2018-03-26 15:56:52 +0200
commit9a1651dcc123e8650d8da0b31fd6dc94940a935d (patch)
tree29fa5ca2f46d5c2fa9ccf4b24fb80e1c2adff956 /drivers/cpufreq/cris-artpec3-cpufreq.c
parent9a3daf58f98bae1d40a3629a8e59c98589801a11 (diff)
cpufreq: remove cris specific drivers
The cris architecture is getting removed, including the artpec3 and etraxfs SoCs, so these cpufreq drivers are now unused. Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Acked-by: Rafael J. Wysocki <rafael@kernel.org> Acked-by: Jesper Nilsson <jesper.nilsson@axis.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'drivers/cpufreq/cris-artpec3-cpufreq.c')
-rw-r--r--drivers/cpufreq/cris-artpec3-cpufreq.c93
1 files changed, 0 insertions, 93 deletions
diff --git a/drivers/cpufreq/cris-artpec3-cpufreq.c b/drivers/cpufreq/cris-artpec3-cpufreq.c
deleted file mode 100644
index 455b4fb78cba..000000000000
--- a/drivers/cpufreq/cris-artpec3-cpufreq.c
+++ /dev/null
@@ -1,93 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-#include <linux/init.h>
-#include <linux/module.h>
-#include <linux/cpufreq.h>
-#include <hwregs/reg_map.h>
-#include <hwregs/reg_rdwr.h>
-#include <hwregs/clkgen_defs.h>
-#include <hwregs/ddr2_defs.h>
-
-static int
-cris_sdram_freq_notifier(struct notifier_block *nb, unsigned long val,
- void *data);
-
-static struct notifier_block cris_sdram_freq_notifier_block = {
- .notifier_call = cris_sdram_freq_notifier
-};
-
-static struct cpufreq_frequency_table cris_freq_table[] = {
- {0, 0x01, 6000},
- {0, 0x02, 200000},
- {0, 0, CPUFREQ_TABLE_END},
-};
-
-static unsigned int cris_freq_get_cpu_frequency(unsigned int cpu)
-{
- reg_clkgen_rw_clk_ctrl clk_ctrl;
- clk_ctrl = REG_RD(clkgen, regi_clkgen, rw_clk_ctrl);
- return clk_ctrl.pll ? 200000 : 6000;
-}
-
-static int cris_freq_target(struct cpufreq_policy *policy, unsigned int state)
-{
- reg_clkgen_rw_clk_ctrl clk_ctrl;
- clk_ctrl = REG_RD(clkgen, regi_clkgen, rw_clk_ctrl);
-
- local_irq_disable();
-
- /* Even though we may be SMP they will share the same clock
- * so all settings are made on CPU0. */
- if (cris_freq_table[state].frequency == 200000)
- clk_ctrl.pll = 1;
- else
- clk_ctrl.pll = 0;
- REG_WR(clkgen, regi_clkgen, rw_clk_ctrl, clk_ctrl);
-
- local_irq_enable();
-
- return 0;
-}
-
-static int cris_freq_cpu_init(struct cpufreq_policy *policy)
-{
- return cpufreq_generic_init(policy, cris_freq_table, 1000000);
-}
-
-static struct cpufreq_driver cris_freq_driver = {
- .get = cris_freq_get_cpu_frequency,
- .verify = cpufreq_generic_frequency_table_verify,
- .target_index = cris_freq_target,
- .init = cris_freq_cpu_init,
- .name = "cris_freq",
- .attr = cpufreq_generic_attr,
-};
-
-static int __init cris_freq_init(void)
-{
- int ret;
- ret = cpufreq_register_driver(&cris_freq_driver);
- cpufreq_register_notifier(&cris_sdram_freq_notifier_block,
- CPUFREQ_TRANSITION_NOTIFIER);
- return ret;
-}
-
-static int
-cris_sdram_freq_notifier(struct notifier_block *nb, unsigned long val,
- void *data)
-{
- int i;
- struct cpufreq_freqs *freqs = data;
- if (val == CPUFREQ_PRECHANGE) {
- reg_ddr2_rw_cfg cfg =
- REG_RD(ddr2, regi_ddr2_ctrl, rw_cfg);
- cfg.ref_interval = (freqs->new == 200000 ? 1560 : 46);
-
- if (freqs->new == 200000)
- for (i = 0; i < 50000; i++);
- REG_WR(bif_core, regi_bif_core, rw_sdram_timing, timing);
- }
- return 0;
-}
-
-
-module_init(cris_freq_init);