diff options
| author | Sahitya Tummala <stummala@codeaurora.org> | 2017-09-27 11:04:41 +0530 |
|---|---|---|
| committer | Ulf Hansson <ulf.hansson@linaro.org> | 2017-10-30 11:45:58 +0100 |
| commit | 401b2d06c4ed69f5d491f9297651bed3fbbfe69b (patch) | |
| tree | 7c9fdf2c04ba8eb8f2585c53782f812c0bea528e /drivers/cpufreq/sh-cpufreq.c | |
| parent | c7ccee224d2d551f712752c4a16947f6529d6506 (diff) | |
mmc: sdhci-msm: Fix HW issue with power IRQ handling during reset
There is a rare scenario in HW, where the first clear pulse could
be lost when the actual reset and clear/read of status register
are happening at the same time. Fix this by retrying upto 10 times
to ensure the status register gets cleared. Otherwise, this will
lead to a spurious power IRQ which results in system instability.
Signed-off-by: Sahitya Tummala <stummala@codeaurora.org>
Signed-off-by: Vijay Viswanath <vviswana@codeaurora.org>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Diffstat (limited to 'drivers/cpufreq/sh-cpufreq.c')
0 files changed, 0 insertions, 0 deletions