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author | Neil Armstrong <narmstrong@baylibre.com> | 2018-11-21 12:19:22 +0100 |
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committer | Neil Armstrong <narmstrong@baylibre.com> | 2018-11-27 16:30:54 +0100 |
commit | 21310c39ec01e82ef3ef9bf8ac385b53ccdc158c (patch) | |
tree | 7e82c1ff4a5a3777eef87294635d348640f501d8 /drivers/devfreq | |
parent | a7d19b05ce817d60ae672c4c112e77892978dc3c (diff) |
clk: meson: Fix GXL HDMI PLL fractional bits width
The GXL Documentation specifies 12 bits for the Fractional bit field,
bit the last bits have a different purpose that we cannot handle right
now, so update the bitwidth to have correct fractional calculations.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
[narmstrong: added comment on GXL HHI_HDMI_PLL_CNTL register shift]
Acked-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Link: https://lkml.kernel.org/r/20181121111922.1277-1-narmstrong@baylibre.com
Diffstat (limited to 'drivers/devfreq')
0 files changed, 0 insertions, 0 deletions