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authorNicolas Ferre <nicolas.ferre@atmel.com>2011-10-17 14:56:40 +0200
committerVinod Koul <vinod.koul@linux.intel.com>2011-11-10 14:13:33 +0530
commit67348450b86cb1b42aa4dd55cf7cde19c2e53461 (patch)
tree85bae4e8095d9cf41f539f401d179dcc9fde35b8 /drivers/dma/at_hdmac_regs.h
parent1ea6b8f48918282bdca0b32a34095504ee65bab5 (diff)
dmaengine: at_hdmac: platform data move to use .id_table
We remove the use of platform data from DMA controller driver. We now use of .id_table to distinguish between compatible types. The two implementations allow to determine the number of channels and the capabilities of the controller. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
Diffstat (limited to 'drivers/dma/at_hdmac_regs.h')
-rw-r--r--drivers/dma/at_hdmac_regs.h8
1 files changed, 8 insertions, 0 deletions
diff --git a/drivers/dma/at_hdmac_regs.h b/drivers/dma/at_hdmac_regs.h
index aa4c9aebab7c..d7d67372e4ff 100644
--- a/drivers/dma/at_hdmac_regs.h
+++ b/drivers/dma/at_hdmac_regs.h
@@ -248,9 +248,16 @@ static inline struct at_dma_chan *to_at_dma_chan(struct dma_chan *dchan)
/*-- Controller ------------------------------------------------------*/
+enum atdma_devtype {
+ ATDMA_DEVTYPE_UNDEFINED = 0,
+ ATDMA_DEVTYPE_SAM9RL, /* compatible with SAM9RL DMA controller */
+ ATDMA_DEVTYPE_SAM9G45, /* compatible with SAM9G45 DMA controller */
+};
+
/**
* struct at_dma - internal representation of an Atmel HDMA Controller
* @chan_common: common dmaengine dma_device object members
+ * @atdma_devtype: identifier of DMA controller compatibility
* @ch_regs: memory mapped register base
* @clk: dma controller clock
* @save_imr: interrupt mask register that is saved on suspend/resume cycle
@@ -260,6 +267,7 @@ static inline struct at_dma_chan *to_at_dma_chan(struct dma_chan *dchan)
*/
struct at_dma {
struct dma_device dma_common;
+ enum atdma_devtype devtype;
void __iomem *regs;
struct clk *clk;
u32 save_imr;