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authorAndy Shevchenko <andriy.shevchenko@linux.intel.com>2015-01-13 19:08:14 +0200
committerVinod Koul <vinod.koul@intel.com>2015-02-04 22:39:44 -0800
commitd8ded50f8b26a224df48f9f93e49440c6a39b77f (patch)
tree7c7620107180b0a2c3ea77770ef8fb9bccfa8341 /drivers/dma/dw/core.c
parentcfd8fef322305bbe9955817464f0d2054ce545c0 (diff)
dmaengine: dw: define DW_DMA_MAX_NR_MASTERS
Instead of using magic number in the code the patch provides DW_DMA_MAX_NR_MASTERS constant. While here, restrict the reading of data width array by amount of the actual number of AHB masters. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Diffstat (limited to 'drivers/dma/dw/core.c')
-rw-r--r--drivers/dma/dw/core.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/dma/dw/core.c b/drivers/dma/dw/core.c
index fcb9a916e6f6..0469d8eda253 100644
--- a/drivers/dma/dw/core.c
+++ b/drivers/dma/dw/core.c
@@ -1562,7 +1562,8 @@ int dw_dma_probe(struct dw_dma_chip *chip, struct dw_dma_platform_data *pdata)
}
} else {
dw->nr_masters = pdata->nr_masters;
- memcpy(dw->data_width, pdata->data_width, 4);
+ for (i = 0; i < dw->nr_masters; i++)
+ dw->data_width[i] = pdata->data_width[i];
}
/* Calculate all channel mask before DMA setup */