diff options
| author | Dave Jiang <dave.jiang@intel.com> | 2019-02-22 10:00:05 -0700 |
|---|---|---|
| committer | Vinod Koul <vkoul@kernel.org> | 2019-02-25 12:18:38 +0530 |
| commit | e0100d40906d5dbe6d09d31083c1a5aaccc947fa (patch) | |
| tree | 5589211aa08cbc8d9c8987e3a8c5b1190c19fd32 /drivers/dma/ioat/registers.h | |
| parent | 11e31e281bd8f482a9277268f7b0d9c213584271 (diff) | |
dmaengine: ioatdma: add descriptor pre-fetch support for v3.4
Adding support for new feature on ioatdma 3.4 hardware that provides
descriptor pre-fetching in order to reduce small DMA latencies.
Signed-off-by: Dave Jiang <dave.jiang@intel.com>
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Diffstat (limited to 'drivers/dma/ioat/registers.h')
| -rw-r--r-- | drivers/dma/ioat/registers.h | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/drivers/dma/ioat/registers.h b/drivers/dma/ioat/registers.h index 2f3bbc88ff2a..2b517d6db5fd 100644 --- a/drivers/dma/ioat/registers.h +++ b/drivers/dma/ioat/registers.h @@ -84,6 +84,9 @@ #define IOAT_CAP_PQ 0x00000200 #define IOAT_CAP_DWBES 0x00002000 #define IOAT_CAP_RAID16SS 0x00020000 +#define IOAT_CAP_DPS 0x00800000 + +#define IOAT_PREFETCH_LIMIT_OFFSET 0x4C /* CHWPREFLMT */ #define IOAT_CHANNEL_MMIO_SIZE 0x80 /* Each Channel MMIO space is this size */ @@ -243,4 +246,11 @@ #define IOAT_CHANERR_MASK_OFFSET 0x2C /* 32-bit Channel Error Register */ +#define IOAT_CHAN_DRSCTL_OFFSET 0xB6 +#define IOAT_CHAN_DRSZ_4KB 0x0000 +#define IOAT_CHAN_DRSZ_8KB 0x0001 +#define IOAT_CHAN_DRSZ_2MB 0x0009 +#define IOAT_CHAN_DRS_EN 0x0100 +#define IOAT_CHAN_DRS_AUTOWRAP 0x0200 + #endif /* _IOAT_REGISTERS_H_ */ |