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authorYazen Ghannam <Yazen.Ghannam@amd.com>2016-09-12 09:59:31 +0200
committerThomas Gleixner <tglx@linutronix.de>2016-09-13 15:23:08 +0200
commitcfee4f6f0b2026380c6bc6913dbd27943df17371 (patch)
tree835891bc3c6371bd62617c198d3c5b547bf33222 /drivers/edac/mce_amd.c
parentbad744b7f29d264c2c2ad8fb723dd480e6c9b007 (diff)
x86/mce/AMD: Read MSRs on the CPU allocating the threshold blocks
Scalable MCA systems allow non-core MCA banks to only be accessible by certain CPUs. The MSRs for these banks are Read-as-Zero on other CPUs. During allocate_threshold_blocks(), get_block_address() can be scheduled on CPUs other than the one allocating the block. This causes the MSRs to be read on the wrong CPU and results in incorrect behavior. Add a @cpu parameter to get_block_address() and pass this in to ensure that the MSRs are only read on the CPU that is allocating the block. Signed-off-by: Yazen Ghannam <Yazen.Ghannam@amd.com> Signed-off-by: Borislav Petkov <bp@suse.de> Link: http://lkml.kernel.org/r/1472673994-12235-2-git-send-email-Yazen.Ghannam@amd.com Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'drivers/edac/mce_amd.c')
0 files changed, 0 insertions, 0 deletions