diff options
author | Dave Airlie <airlied@redhat.com> | 2019-08-27 17:22:15 +1000 |
---|---|---|
committer | Dave Airlie <airlied@redhat.com> | 2019-08-27 17:22:15 +1000 |
commit | 578d2342ec702e5fb8a77983fabb3754ae3e9660 (patch) | |
tree | 399b2fa095abc00356c3acddb68cffe04d47e762 /drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c | |
parent | c87237110f2553b4200a8b3401a01198edfcf0d9 (diff) | |
parent | b4d857ded1c50fb2bd1168d6f80ae81397ae468b (diff) |
Merge tag 'drm-next-5.4-2019-08-23' of git://people.freedesktop.org/~agd5f/linux into drm-next
drm-next-5.4-2019-08-23:
amdgpu:
- Enable power features on Navi12
- Enable power features on Arcturus
- RAS updates
- Initial Renoir APU support
- Enable power featyres on Renoir
- DC gamma fixes
- DCN2 fixes
- GPU reset support for Picasso
- Misc cleanups and fixes
scheduler:
- Possible race fix
Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Alex Deucher <alexdeucher@gmail.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190823202620.3870-1-alexander.deucher@amd.com
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c')
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c | 11 |
1 files changed, 7 insertions, 4 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c index d79ab1da9e07..5e8bdded265f 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c @@ -251,7 +251,9 @@ int amdgpu_gart_unbind(struct amdgpu_device *adev, uint64_t offset, } mb(); amdgpu_asic_flush_hdp(adev, NULL); - amdgpu_gmc_flush_gpu_tlb(adev, 0, 0); + for (i = 0; i < adev->num_vmhubs; i++) + amdgpu_gmc_flush_gpu_tlb(adev, 0, i, 0); + return 0; } @@ -310,9 +312,9 @@ int amdgpu_gart_bind(struct amdgpu_device *adev, uint64_t offset, uint64_t flags) { #ifdef CONFIG_DRM_AMDGPU_GART_DEBUGFS - unsigned i,t,p; + unsigned t,p; #endif - int r; + int r, i; if (!adev->gart.ready) { WARN(1, "trying to bind memory to uninitialized GART !\n"); @@ -336,7 +338,8 @@ int amdgpu_gart_bind(struct amdgpu_device *adev, uint64_t offset, mb(); amdgpu_asic_flush_hdp(adev, NULL); - amdgpu_gmc_flush_gpu_tlb(adev, 0, 0); + for (i = 0; i < adev->num_vmhubs; i++) + amdgpu_gmc_flush_gpu_tlb(adev, 0, i, 0); return 0; } |