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| author | Victor Skvortsov <victor.skvortsov@amd.com> | 2022-02-03 21:13:40 +0000 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2022-02-16 17:30:02 -0500 |
| commit | aa79d3808e8cf1f5fd0f1c20c2e6a6865b5b940c (patch) | |
| tree | de9b1907536e2a69845a4c439cbdec718a5de223 /drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h | |
| parent | fa39f936dbb96626d3345fd8d66af6be6f47ff9e (diff) | |
drm/amdgpu: Fix wait for RLCG command completion
if (!(tmp & flag)) condition will always evaluate to true
when the flag is 0x0 (AMDGPU_RLCG_GC_WRITE). Instead check
that address bits are cleared to determine whether
the command is complete.
Signed-off-by: Victor Skvortsov <victor.skvortsov@amd.com>
Tested-by: Bokun Zhang <bokun.zhang@amd.com>
Reviewed by: Shaoyun.liu <Shaoyun.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h')
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h index 645093610aa0..239f232f9c02 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h @@ -43,6 +43,8 @@ #define AMDGPU_RLCG_WRONG_OPERATION_TYPE 0x2000000 #define AMDGPU_RLCG_REG_NOT_IN_RANGE 0x1000000 +#define AMDGPU_RLCG_SCRATCH1_ADDRESS_MASK 0xFFFFF + /* all asic after AI use this offset */ #define mmRCC_IOV_FUNC_IDENTIFIER 0xDE5 /* tonga/fiji use this offset */ |