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authorshaoyunl <shaoyun.liu@amd.com>2021-09-08 22:12:55 -0400
committerAlex Deucher <alexander.deucher@amd.com>2021-09-14 15:57:11 -0400
commit8e6d0b699635ecc5bad8629b8da685621aa416ca (patch)
tree2c23b8c8a1b658ed6b38b15e8cd10d7bb1180431 /drivers/gpu/drm/amd/amdgpu/amdgv_sriovmsg.h
parent3da35006fef89d15d101622445d7f4760953a5f1 (diff)
drm/amdgpu: Get atomicOps info from Host for sriov setup
The AtomicOp Requester Enable bit is reserved in VFs and the PF value applies to all associated VFs. so guest driver can not directly enable the atomicOps for VF, it depends on PF to enable it. In current design, amdgpu driver will get the enabled atomicOps bits through private pf2vf data Signed-off-by: shaoyunl <shaoyun.liu@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgv_sriovmsg.h')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgv_sriovmsg.h4
1 files changed, 3 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgv_sriovmsg.h b/drivers/gpu/drm/amd/amdgpu/amdgv_sriovmsg.h
index a434c71fde8e..995899191288 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgv_sriovmsg.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgv_sriovmsg.h
@@ -204,8 +204,10 @@ struct amd_sriov_msg_pf2vf_info {
} mm_bw_management[AMD_SRIOV_MSG_RESERVE_VCN_INST];
/* UUID info */
struct amd_sriov_msg_uuid_info uuid_info;
+ /* pcie atomic Ops info */
+ uint32_t pcie_atomic_ops_enabled_flags;
/* reserved */
- uint32_t reserved[256 - 47];
+ uint32_t reserved[256 - 48];
};
struct amd_sriov_msg_vf2pf_info_header {