diff options
author | Hawking Zhang <Hawking.Zhang@amd.com> | 2019-09-03 06:48:00 +0800 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2019-09-13 17:42:02 -0500 |
commit | 1c70d3d9c4a6d4e4b4425d78e0a919cfaa3cf8db (patch) | |
tree | c97042d57e34292c95b5fe46c79a14148c78ead6 /drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c | |
parent | 47930de4aa7068188e64475cdc0f2c8f4e1ff194 (diff) |
drm/amdgpu/nbio: switch to amdgpu_nbio_ras_late_init helper function
amdgpu_nbio_ras_late_init is used to init nbio specfic
ras debugfs/sysfs node and nbio specific interrupt handler.
It can be shared among nbio generations
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c')
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c | 49 |
1 files changed, 1 insertions, 48 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c b/drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c index f25c6a9c6718..bfa919190fb4 100644 --- a/drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c +++ b/drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c @@ -474,53 +474,6 @@ static int nbio_v7_4_init_ras_err_event_athub_interrupt (struct amdgpu_device *a return 0; } -static int nbio_v7_4_ras_late_init(struct amdgpu_device *adev) -{ - int r; - struct ras_ih_if ih_info = { - .cb = NULL, - }; - struct ras_fs_if fs_info = { - .sysfs_name = "pcie_bif_err_count", - .debugfs_name = "pcie_bif_err_inject", - }; - - if (!adev->nbio.ras_if) { - adev->nbio.ras_if = kmalloc(sizeof(struct ras_common_if), GFP_KERNEL); - if (!adev->nbio.ras_if) - return -ENOMEM; - adev->nbio.ras_if->block = AMDGPU_RAS_BLOCK__PCIE_BIF; - adev->nbio.ras_if->type = AMDGPU_RAS_ERROR__MULTI_UNCORRECTABLE; - adev->nbio.ras_if->sub_block_index = 0; - strcpy(adev->nbio.ras_if->name, "pcie_bif"); - } - ih_info.head = fs_info.head = *adev->nbio.ras_if; - r = amdgpu_ras_late_init(adev, adev->nbio.ras_if, - &fs_info, &ih_info); - if (r) - goto free; - - if (amdgpu_ras_is_supported(adev, adev->nbio.ras_if->block)) { - r = amdgpu_irq_get(adev, &adev->nbio.ras_controller_irq, 0); - if (r) - goto late_fini; - r = amdgpu_irq_get(adev, &adev->nbio.ras_err_event_athub_irq, 0); - if (r) - goto late_fini; - } else { - r = 0; - goto free; - } - - return 0; -late_fini: - amdgpu_ras_late_fini(adev, adev->nbio.ras_if, &ih_info); -free: - kfree(adev->nbio.ras_if); - adev->nbio.ras_if = NULL; - return r; -} - const struct amdgpu_nbio_funcs nbio_v7_4_funcs = { .get_hdp_flush_req_offset = nbio_v7_4_get_hdp_flush_req_offset, .get_hdp_flush_done_offset = nbio_v7_4_get_hdp_flush_done_offset, @@ -546,5 +499,5 @@ const struct amdgpu_nbio_funcs nbio_v7_4_funcs = { .handle_ras_err_event_athub_intr_no_bifring = nbio_v7_4_handle_ras_err_event_athub_intr_no_bifring, .init_ras_controller_interrupt = nbio_v7_4_init_ras_controller_interrupt, .init_ras_err_event_athub_interrupt = nbio_v7_4_init_ras_err_event_athub_interrupt, - .ras_late_init = nbio_v7_4_ras_late_init, + .ras_late_init = amdgpu_nbio_ras_late_init, }; |