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| author | Rex Zhu <Rex.Zhu@amd.com> | 2016-09-13 19:38:38 +0800 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2016-09-16 15:52:51 -0400 |
| commit | d932f37c4aa8b380f8ed529d1472a2ff49b95727 (patch) | |
| tree | dd3ef372f8d091f02211b459ab4d6929d5d5b83b /drivers/gpu/drm/amd/amdgpu/tonga_smum.h | |
| parent | aa0ef3ccd6410c14d3de586bd83ce532cad2e67e (diff) | |
drm/amdgpu: not set cg for vce/uvd in late init.
no need to set cg for uvd/vce in late init.
As when ring test, uvd/vce's dpm will be enabled/disabled.
the cg will be set.
fix issue suspend when play video or encode, then resume back,
the clock will be bypassed on Polaris/Fiji.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/tonga_smum.h')
0 files changed, 0 insertions, 0 deletions