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authorStanley.Yang <Stanley.Yang@amd.com>2022-02-11 17:35:18 +0800
committerAlex Deucher <alexander.deucher@amd.com>2022-02-11 16:19:59 -0500
commit1915a433954262ac7466469d1a4684ac54218af4 (patch)
treefda96a60812fcd0c590fc1078ff333d8f1933b90 /drivers/gpu/drm/amd/amdgpu/umc_v6_7.c
parentf3986e86b2d861a2ed2d336bafe53b5c404cb995 (diff)
drm/amdgpu: adjust register address calculation
the UMC_STATUS register is not linear, adjust offset calculation formula to get correct address Signed-off-by: Stanley.Yang <Stanley.Yang@amd.com> Reviewed-by: Tao Zhou <tao.zhou1@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/umc_v6_7.c')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/umc_v6_7.c7
1 files changed, 7 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/umc_v6_7.c b/drivers/gpu/drm/amd/amdgpu/umc_v6_7.c
index e613511e07e1..87e4ef18e151 100644
--- a/drivers/gpu/drm/amd/amdgpu/umc_v6_7.c
+++ b/drivers/gpu/drm/amd/amdgpu/umc_v6_7.c
@@ -47,6 +47,13 @@ static inline uint32_t get_umc_v6_7_reg_offset(struct amdgpu_device *adev,
uint32_t umc_inst,
uint32_t ch_inst)
{
+ uint32_t index = umc_inst * adev->umc.channel_inst_num + ch_inst;
+
+ /* adjust umc and channel index offset,
+ * the register address is not linear on each umc instace */
+ umc_inst = index / 4;
+ ch_inst = index % 4;
+
return adev->umc.channel_offs * ch_inst + UMC_V6_7_INST_DIST * umc_inst;
}