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authorYongqiang Sun <yongqiang.sun@amd.com>2020-10-30 09:29:07 -0400
committerAlex Deucher <alexander.deucher@amd.com>2020-11-10 14:26:10 -0500
commit4b0b1d05265b044472a23b76d5fda8d7fb218144 (patch)
tree4daeb9c893028eb5590445f22acf0b4bfc00fb63 /drivers/gpu/drm/amd/display/dc/dc.h
parentb5fce050f041618cc6f9185d90c84f5d9599ce45 (diff)
drm/amd/display: check actual clock value.
[Why] Actual dpp/disp clock PMFW set are always equal or more than requested. Need to cache the actual clock for debugging purpose. [How] Add actuall dpp/disp clk in clock manager and save it when set clocks. Add an ASSERT in case of actual clock less than requested. Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com> Acked-by: Bindu Ramamurthy <bindu.r@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dc.h')
-rw-r--r--drivers/gpu/drm/amd/display/dc/dc.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dc.h b/drivers/gpu/drm/amd/display/dc/dc.h
index 5cf0b988c9c3..4c57cf099b5e 100644
--- a/drivers/gpu/drm/amd/display/dc/dc.h
+++ b/drivers/gpu/drm/amd/display/dc/dc.h
@@ -342,7 +342,9 @@ enum dcn_pwr_state {
*/
struct dc_clocks {
int dispclk_khz;
+ int actual_dispclk_khz;
int dppclk_khz;
+ int actual_dppclk_khz;
int disp_dpp_voltage_level_khz;
int dcfclk_khz;
int socclk_khz;