diff options
author | Mustapha Ghaddar <mghaddar@amd.com> | 2022-11-02 10:14:16 -0400 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2022-11-23 09:47:14 -0500 |
commit | fe4e2662b2ddccd7fa8fc034ed71880626fab279 (patch) | |
tree | e6937c5008d728687ba42d3f639f096e50a961c5 /drivers/gpu/drm/amd/display/dc/dc_link.h | |
parent | 7ce24a3606855f656f30c174e3078a1c642f1e41 (diff) |
drm/amd/display: Phase 1 Add Bw Allocation source and header files
[WHY]
To implement BW Allocation as per USB4 spec chapter 10.7
[HOW]
Implement the DP-Tx portion of the logic to interact with DPIA
Reviewed-by: Wenjing Liu <Wenjing.Liu@amd.com>
Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Brian Chang <Brian.Chang@amd.com>
Signed-off-by: Mustapha Ghaddar <mghaddar@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dc_link.h')
-rw-r--r-- | drivers/gpu/drm/amd/display/dc/dc_link.h | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dc_link.h b/drivers/gpu/drm/amd/display/dc/dc_link.h index dc6afe33bca2..2e18bcf6b11a 100644 --- a/drivers/gpu/drm/amd/display/dc/dc_link.h +++ b/drivers/gpu/drm/amd/display/dc/dc_link.h @@ -151,6 +151,20 @@ struct dc_panel_config { bool optimize_edp_link_rate; /* eDP ILR */ } ilr; }; + +/* + * USB4 DPIA BW ALLOCATION STRUCTS + */ +struct dc_dpia_bw_alloc { + int sink_verified_bw; // The Verified BW that sink can allocated and use that has been verified already + int sink_allocated_bw; // The Actual Allocated BW that sink currently allocated + int padding_bw; // The Padding "Un-used" BW allocated by CM for padding reasons + int sink_max_bw; // The Max BW that sink can require/support + int estimated_bw; // The estimated available BW for this DPIA + int bw_granularity; // BW Granularity + bool bw_alloc_enabled; // The BW Alloc Mode Support is turned ON for all 3: DP-Tx & Dpia & CM +}; + /* * A link contains one or more sinks and their connected status. * The currently active signal type (HDMI, DP-SST, DP-MST) is also reported. |