diff options
| author | Dave Airlie <airlied@redhat.com> | 2017-10-03 14:27:13 +1000 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2017-10-06 13:04:42 -0400 |
| commit | 5667ff5c117f2d8735f27a267bc68a0811c55075 (patch) | |
| tree | 145ea4a2d8a4bb5f0fa1a78101b35954a35f6a6f /drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c | |
| parent | 2016b641f421ecb28c21e34063ac8bd43ca6cfdc (diff) | |
amdgpu/dc: fix a bunch of misc whitespace.
This just aligns a few things with kernel style.
Signed-off-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c b/drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c index bcd544d85621..67ac737eaa7e 100644 --- a/drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c +++ b/drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c @@ -1238,8 +1238,8 @@ void dce110_timing_generator_setup_global_swap_lock( DCP_GSL_CONTROL, DCP_GSL_HSYNC_FLIP_FORCE_DELAY); - /* Keep signal low (pending high) during 6 lines. - * Also defines minimum interval before re-checking signal. */ + /* Keep signal low (pending high) during 6 lines. + * Also defines minimum interval before re-checking signal. */ set_reg_field_value(value, HFLIP_CHECK_DELAY, DCP_GSL_CONTROL, |