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authorDillon Varone <dillon.varone@amd.com>2024-03-14 16:21:32 -0400
committerAlex Deucher <alexander.deucher@amd.com>2024-05-20 16:20:24 -0400
commit7991585b7743fb9b88e8cd2317ce7a87c4f86450 (patch)
tree07366113409dfdbd86fd55d6cd683361dd75aed7 /drivers/gpu/drm/amd/display/dc/dce
parentbea00fab2b0e5359ee88a2b127f15a35cd48872b (diff)
drm/amd/display: Modify HPO pixel clock programming to support DPM
Need to select DTBCLK and DPREFCLK as DTBCLK_p source according to hardware guidance. Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Dillon Varone <dillon.varone@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dce')
-rw-r--r--drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c b/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c
index f39700832639..63deb5b60548 100644
--- a/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c
+++ b/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c
@@ -1082,11 +1082,11 @@ static bool dcn401_program_pix_clk(
// all but TMDS gets Driver to program DP_DTO without calling VBIOS Command table
if (!dc_is_tmds_signal(pix_clk_params->signal_type)) {
- long long ref_dtbclk_khz = clock_source->ctx->dc->clk_mgr->funcs->get_dtb_ref_clk_frequency(clock_source->ctx->dc->clk_mgr);
- long long dprefclk_khz = clock_source->ctx->dc->clk_mgr->dprefclk_khz;
long long dtbclk_p_src_clk_khz;
- /* if signal is DP132B128B dtbclk_p_src is DTBCLK else DPREFCLK */
- dtbclk_p_src_clk_khz = encoding == DP_128b_132b_ENCODING ? ref_dtbclk_khz : dprefclk_khz;
+
+ dtbclk_p_src_clk_khz = clock_source->ctx->dc->clk_mgr->dprefclk_khz;
+ dto_params.clk_src = DPREFCLK;
+
if (e) {
dto_params.pixclk_hz = e->target_pixel_rate_khz * e->mult_factor;
dto_params.refclk_hz = dtbclk_p_src_clk_khz * e->div_factor;