diff options
| author | Wenjing Liu <wenjing.liu@amd.com> | 2023-01-18 17:31:24 -0500 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2023-02-08 17:15:51 -0500 |
| commit | 54618888d1ea7a26f8bccfb89e3c2420350c8047 (patch) | |
| tree | 68ab072f1f5daba599d7d8be4f57898d87379cd5 /drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c | |
| parent | 71d7e8904d540dde6eaae4e3bac9cfd1894f4eaa (diff) | |
drm/amd/display: break down dc_link.c
[why]
dc_link contains over 30k line of code, the decision is to break it
down to files residing in link folder based on functionality. This
change is the last break down change which will remove dc_link.c
file after everything is broken down.
[how]
Move remaining dc_link.c functions into link_detection, link_dpms,
link_validation, link_resource, and link_fpga and remove dc_link.
Reviewed-by: George Shen <George.Shen@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Wenjing Liu <wenjing.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c index 69b71afbde3a..b83873a3a534 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c +++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c @@ -2449,7 +2449,7 @@ static void dcn20_reset_back_end_for_pipe( * VBIOS lit up eDP, so check link status too. */ if (!pipe_ctx->stream->dpms_off || link->link_status.link_active) - core_link_disable_stream(pipe_ctx); + link_set_dpms_off(pipe_ctx); else if (pipe_ctx->stream_res.audio) dc->hwss.disable_audio_stream(pipe_ctx); @@ -2469,7 +2469,7 @@ static void dcn20_reset_back_end_for_pipe( } } else if (pipe_ctx->stream_res.dsc) { - dp_set_dsc_enable(pipe_ctx, false); + link_set_dsc_enable(pipe_ctx, false); } /* by upper caller loop, parent pipe: pipe0, will be reset last. @@ -2743,7 +2743,7 @@ void dcn20_enable_stream(struct pipe_ctx *pipe_ctx) dc->hwss.update_info_frame(pipe_ctx); if (dc_is_dp_signal(pipe_ctx->stream->signal)) - dp_source_sequence_trace(link, DPCD_SOURCE_SEQ_AFTER_UPDATE_INFO_FRAME); + link_dp_source_sequence_trace(link, DPCD_SOURCE_SEQ_AFTER_UPDATE_INFO_FRAME); /* enable early control to avoid corruption on DP monitor*/ active_total_with_borders = |