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authorGeorge Shen <george.shen@amd.com>2022-10-14 17:46:03 -0400
committerAlex Deucher <alexander.deucher@amd.com>2022-11-02 17:16:25 -0400
commitd5e0fb0d9dea545defb963ec1073bd9a1a8b5395 (patch)
tree88674228656778d0f1c7c48b672a75e23eb23576 /drivers/gpu/drm/amd/display/dc/dml/display_mode_structs.h
parent8dc323133d74518e3b5b07242e2b2f088799ea6e (diff)
drm/amd/display: Add DSC delay factor workaround
[Why] Certain 4K high refresh rate modes requiring DSC are exhibiting top of screen underflow corruption. Increasing the DSC delay by a factor of 6 percent stops the underflow for most use cases. [How] Multiply DSC delay requirement in DML by a factor. Add debug option to make this DSC delay factor configurable. Reviewed-by: Alvin Lee <Alvin.Lee2@amd.com> Acked-by: Alex Hung <alex.hung@amd.com> Signed-off-by: George Shen <george.shen@amd.com> Tested-by: Mark Broadworth <mark.broadworth@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dml/display_mode_structs.h')
-rw-r--r--drivers/gpu/drm/amd/display/dc/dml/display_mode_structs.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dml/display_mode_structs.h b/drivers/gpu/drm/amd/display/dc/dml/display_mode_structs.h
index f33a8879b05a..d7be01ac0751 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/display_mode_structs.h
+++ b/drivers/gpu/drm/amd/display/dc/dml/display_mode_structs.h
@@ -364,6 +364,9 @@ struct _vcs_dpi_ip_params_st {
unsigned int max_num_dp2p0_outputs;
unsigned int max_num_dp2p0_streams;
unsigned int VBlankNomDefaultUS;
+
+ /* DM workarounds */
+ double dsc_delay_factor_wa; // TODO: Remove after implementing root cause fix
};
struct _vcs_dpi_display_xfc_params_st {