diff options
author | Alex Deucher <alexander.deucher@amd.com> | 2018-05-16 15:34:19 -0500 |
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committer | Alex Deucher <alexander.deucher@amd.com> | 2018-05-18 16:08:19 -0500 |
commit | a1a0c40664fbd0bd1a9fa53e14ccab539005e2ca (patch) | |
tree | 4963361677294b0d367328721ce110bca09994c8 /drivers/gpu/drm/amd/display/include | |
parent | b4b9f944e4ee3d1a268d96d7de2d519b491e8ea5 (diff) |
drm/amdgpu/display: fix vega12/20 handling in dal_asic_id.h
- Remove unused ASICREV_IS_VEGA12_p() macro
- Fix ASICREV_IS_VEGA12_P() macro to properly check against vega20
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/include')
-rw-r--r-- | drivers/gpu/drm/amd/display/include/dal_asic_id.h | 8 |
1 files changed, 3 insertions, 5 deletions
diff --git a/drivers/gpu/drm/amd/display/include/dal_asic_id.h b/drivers/gpu/drm/amd/display/include/dal_asic_id.h index cac069dd2a0e..25029ed42d89 100644 --- a/drivers/gpu/drm/amd/display/include/dal_asic_id.h +++ b/drivers/gpu/drm/amd/display/include/dal_asic_id.h @@ -115,19 +115,17 @@ /* DCE12 */ #define AI_UNKNOWN 0xFF -#define AI_VEGA20_P_A0 40 -#define ASICREV_IS_VEGA20_P(eChipRev) ((eChipRev >= AI_VEGA20_P_A0) && (eChipRev < AI_UNKNOWN)) - #define AI_GREENLAND_P_A0 1 #define AI_GREENLAND_P_A1 2 #define AI_UNKNOWN 0xFF #define AI_VEGA12_P_A0 20 +#define AI_VEGA20_P_A0 40 #define ASICREV_IS_GREENLAND_M(eChipRev) (eChipRev < AI_VEGA12_P_A0) #define ASICREV_IS_GREENLAND_P(eChipRev) (eChipRev < AI_VEGA12_P_A0) -#define ASICREV_IS_VEGA12_P(eChipRev) ((eChipRev >= AI_VEGA12_P_A0) && (eChipRev < AI_UNKNOWN)) -#define ASICREV_IS_VEGA12_p(eChipRev) ((eChipRev >= AI_VEGA12_P_A0) && (eChipRev < AI_UNKNOWN)) +#define ASICREV_IS_VEGA12_P(eChipRev) ((eChipRev >= AI_VEGA12_P_A0) && (eChipRev < AI_VEGA20_P_A0)) +#define ASICREV_IS_VEGA20_P(eChipRev) ((eChipRev >= AI_VEGA20_P_A0) && (eChipRev < AI_UNKNOWN)) /* DCN1_0 */ #define INTERNAL_REV_RAVEN_A0 0x00 /* First spin of Raven */ |