diff options
| author | Darren Powell <darren.powell@amd.com> | 2021-04-07 18:40:34 -0400 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2021-04-28 23:35:49 -0400 |
| commit | ede14a1b32234685e2d6893205ff24c959b3f021 (patch) | |
| tree | 698babb78ae6545bd3e45bde86df5b6f30e6ebab /drivers/gpu/drm/amd/pm/amdgpu_pm.c | |
| parent | 51ec699275d91f52d861926f176635ce08b8af11 (diff) | |
amdgpu/pm: set pp_dpm_dcefclk to readonly on NAVI10 and newer gpus
v2 : change condition to apply to all chips after NAVI10
Writing to dcefclk causes the gpu to become unresponsive, and requires a reboot.
Patch prevents user from successfully writing to file pp_dpm_dcefclk on parts
NAVI10 and newer, and gives better user feedback that this operation is not allowed.
Signed-off-by: Darren Powell <darren.powell@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/pm/amdgpu_pm.c')
| -rw-r--r-- | drivers/gpu/drm/amd/pm/amdgpu_pm.c | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/pm/amdgpu_pm.c b/drivers/gpu/drm/amd/pm/amdgpu_pm.c index 8128603ef495..4e459ef632ef 100644 --- a/drivers/gpu/drm/amd/pm/amdgpu_pm.c +++ b/drivers/gpu/drm/amd/pm/amdgpu_pm.c @@ -1893,6 +1893,14 @@ static int default_attr_update(struct amdgpu_device *adev, struct amdgpu_device_ } } + if (DEVICE_ATTR_IS(pp_dpm_dcefclk)) { + /* SMU MP1 does not support dcefclk level setting */ + if (asic_type >= CHIP_NAVI10) { + dev_attr->attr.mode &= ~S_IWUGO; + dev_attr->store = NULL; + } + } + #undef DEVICE_ATTR_IS return 0; |