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authorLuben Tuikov <luben.tuikov@amd.com>2021-05-04 02:25:29 -0400
committerAlex Deucher <alexander.deucher@amd.com>2021-05-10 18:08:12 -0400
commit8ab0d6f030bab4d8c7310e9894f6fdb59817d241 (patch)
treea145df16fd935e667d91dac15b3b5aae407120c3 /drivers/gpu/drm/amd/pm/powerplay
parente509965e58ab2c96418e1a5e756e25d9a54e0765 (diff)
drm/amdgpu: Rename to ras_*_enabled
Rename, ras_hw_supported --> ras_hw_enabled, and ras_features --> ras_enabled, to show that ras_enabled is a subset of ras_hw_enabled, which itself is a subset of the ASIC capability. Cc: Alexander Deucher <Alexander.Deucher@amd.com> Cc: John Clements <john.clements@amd.com> Cc: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Luben Tuikov <luben.tuikov@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Reviewed-by: John Clements <John.Clements@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/pm/powerplay')
-rw-r--r--drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega20_baco.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega20_baco.c b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega20_baco.c
index f6b1efce450c..8d99c7a5abf8 100644
--- a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega20_baco.c
+++ b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega20_baco.c
@@ -85,7 +85,7 @@ int vega20_baco_set_state(struct pp_hwmgr *hwmgr, enum BACO_STATE state)
return 0;
if (state == BACO_STATE_IN) {
- if (!ras || !adev->ras_features) {
+ if (!ras || !adev->ras_enabled) {
data = RREG32_SOC15(THM, 0, mmTHM_BACO_CNTL);
data |= 0x80000000;
WREG32_SOC15(THM, 0, mmTHM_BACO_CNTL, data);