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author | Dillon Varone <dillon.varone@amd.com> | 2022-04-13 17:54:19 -0400 |
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committer | Alex Deucher <alexander.deucher@amd.com> | 2022-06-03 16:45:00 -0400 |
commit | 2267a195e28cc438cb45936c4562f958502d4038 (patch) | |
tree | 78783248f7fd34ff31ff3b34f03dbd12651f3b5c /drivers/gpu/drm/amd/pm/swsmu/smu11/cyan_skillfish_ppt.c | |
parent | 2cfe34e18970d26bff73c63f16c76dae22138d19 (diff) |
drm/amd/display: Disable DTB Ref Clock Switching in dcn32
[How & Why]
To be enabled once PMFW supports it.
Signed-off-by: Dillon Varone <dillon.varone@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/pm/swsmu/smu11/cyan_skillfish_ppt.c')
0 files changed, 0 insertions, 0 deletions