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authorEvan Quan <evan.quan@amd.com>2020-01-30 16:46:38 +0800
committerAlex Deucher <alexander.deucher@amd.com>2020-02-04 10:37:08 -0500
commit1cf8c930b378016846c88ef0f1444248033326ec (patch)
treeedd5b4e6e46e26e8fda94dd4202eef0b5fcdb085 /drivers/gpu/drm/amd/powerplay/smu_internal.h
parentf38abc15d157b7b31fa7f651dc8bf92858c963f8 (diff)
drm/amd/powerplay: fix navi10 system intermittent reboot issue V2
This workaround is needed only for Navi10 12 Gbps SKUs. V2: added SMU firmware version guard Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Feifei Xu <Feifei.Xu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
Diffstat (limited to 'drivers/gpu/drm/amd/powerplay/smu_internal.h')
-rw-r--r--drivers/gpu/drm/amd/powerplay/smu_internal.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/powerplay/smu_internal.h b/drivers/gpu/drm/amd/powerplay/smu_internal.h
index 783319ec8bf9..7bd200ffcda8 100644
--- a/drivers/gpu/drm/amd/powerplay/smu_internal.h
+++ b/drivers/gpu/drm/amd/powerplay/smu_internal.h
@@ -207,4 +207,7 @@ int smu_send_smc_msg(struct smu_context *smu, enum smu_message_type msg);
#define smu_update_pcie_parameters(smu, pcie_gen_cap, pcie_width_cap) \
((smu)->ppt_funcs->update_pcie_parameters ? (smu)->ppt_funcs->update_pcie_parameters((smu), (pcie_gen_cap), (pcie_width_cap)) : 0)
+#define smu_disable_umc_cdr_12gbps_workaround(smu) \
+ ((smu)->ppt_funcs->disable_umc_cdr_12gbps_workaround ? (smu)->ppt_funcs->disable_umc_cdr_12gbps_workaround((smu)) : 0)
+
#endif