diff options
| author | Jyri Sarha <jsarha@ti.com> | 2019-05-27 16:47:54 +0300 |
|---|---|---|
| committer | Andrzej Hajda <a.hajda@samsung.com> | 2019-05-31 15:57:19 +0200 |
| commit | 8dbfc5b65023b67397aca28e8adb25c819f6398c (patch) | |
| tree | 4fb69c90dd31bfcca16b91d2bfc386bd2b935fd6 /drivers/gpu/drm/bridge/sii902x.c | |
| parent | bceee9bb894887ac38fae0f3f784dad4302114fd (diff) | |
drm/bridge: sii902x: pixel clock unit is 10kHz instead of 1kHz
The pixel clock unit in the first two registers (0x00 and 0x01) of
sii9022 is 10kHz, not 1kHz as in struct drm_display_mode. Division by
10 fixes the issue.
Signed-off-by: Jyri Sarha <jsarha@ti.com>
Reviewed-by: Andrzej Hajda <a.hajda@samsung.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1a2a8eae0b9d6333e7a5841026bf7fd65c9ccd09.1558964241.git.jsarha@ti.com
Diffstat (limited to 'drivers/gpu/drm/bridge/sii902x.c')
| -rw-r--r-- | drivers/gpu/drm/bridge/sii902x.c | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/drivers/gpu/drm/bridge/sii902x.c b/drivers/gpu/drm/bridge/sii902x.c index 2ced4f404cae..beb200141d1d 100644 --- a/drivers/gpu/drm/bridge/sii902x.c +++ b/drivers/gpu/drm/bridge/sii902x.c @@ -249,10 +249,11 @@ static void sii902x_bridge_mode_set(struct drm_bridge *bridge, struct regmap *regmap = sii902x->regmap; u8 buf[HDMI_INFOFRAME_SIZE(AVI)]; struct hdmi_avi_infoframe frame; + u16 pixel_clock_10kHz = adj->clock / 10; int ret; - buf[0] = adj->clock; - buf[1] = adj->clock >> 8; + buf[0] = pixel_clock_10kHz & 0xff; + buf[1] = pixel_clock_10kHz >> 8; buf[2] = adj->vrefresh; buf[3] = 0x00; buf[4] = adj->hdisplay; |